TA7S04 Datasheet, PDF (58/198 Pages) List of Unclassifed Manufacturers – Triscend A7S Configurable System-on-Chip Platform

Triscend A7S Configurable System-on-Chip Platform
ory subsystem (see Table 28). FastChip automatically reclaims the pins as user-defined
PIO pins if not used as chip-enable signals.
NOTE:
The memory interface only supports external interfaces built using byte- wide and
16-bit wide memory devices. If using 16-bit wide memories, be sure to set the
MSS_FLASH_X16 bit in the MSSIU Configuration Register.
The amount of addressable external static memory (i.e., not SDRAM) begins at a default
minimum of 1M bytes, or 20 address lines. Up to four additional PIO pins can be re-
claimed as address lines to expand to amount of external memory, up to 16M bytes
maximum.
If less than the maximum external static memory is attached, then multiple copies of the
attached memory appear, duplicated at every multiple of the size of the memory. Exam-
ples are shown in Figure 30. For instance, if only 8Mbytes of Flash are attached, then two
copies of the memory appear in the Flash address region. One copy appears at
0xD0000_0000, another at 0xD080_0000. The same applies if the static memory is ali-
ased into the bottom of memory (see Alias Enable Register).
0xD0FF_FFFF
0xD000_0000
16 MB
Flash
8 MB Flash
(copy)
4 MB Flash
(copy)
4 MB Flash
(copy)
8 MB Flash
4 MB Flash
(copy)
4 MB Flash
2 MB Flash
(copy)
2 MB Flash
(copy)
2 MB Flash
(copy)
2 MB Flash
(copy)
2 MB Flash
(copy)
2 MB Flash
(copy)
2 MB Flash
(copy)
2 MB Flash
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB (copy)
1 MB Flash
Figure 30. If less than the maximum static memory is attached, copies of the
memory appear at every boundary of the attached memory size.
The external memory is mapped linearly in the system memory map starting at the pre-
defined base address (see Figure 28).
The external memory content follows the little endian format. Figure 31, Figure 32, and
Figure 33 illustrate the external memory content for each of the possible data-width or-
ganizations.
NOTE:
If executing directly from an 8-bit or 16-bit wide external memory, the
ARM7TMDI’s Thumb mode offers improved performance. By using a 16-bit in-
struction instead of a 32-bit instruction, Thumb mode reduces the number of
fetches required from external memory.
SUBJECT TO CHANGE
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TCH305-0001-002