BQ4024 Datasheet, PDF (4/12 Pages) List of Unclassifed Manufacturers – 128Kx16 Nonvolatile SRAM

bq4024/bq4024Y
AC Test Conditions
Parameter
Input pulse levels
Input rise and fall times
Input and output timing reference levels
Output load (including scope and jig)
Test Conditions
0V to 3.0V
5 ns
1.5 V (unless otherwise specified)
See Figures 1 and 2
Figure 1. Output Load A
Figure 2. Output Load B
Read Cycle (TA = 0 to 70°C, VCCmin ≤ VCC ≤ VCCmax)
Symbol
tRC
tAA
tACE
tOE
tCLZ
tOLZ
tCHZ
tOHZ
tOH
Parameter
Read cycle time
Address access time
Chip enable access time
Output enable to output valid
Chip enable to output in low Z
Output enable to output in low Z
Chip disable to output in high Z
Output disable to output in high Z
Output hold from address change
-85
-120
Min. Max. Min. Max.
85
- 120 -
-
85
- 120
-
85
- 120
-
45
- 60
5
-
5
-
0
-
0
-
0
35
0 45
0
25
0 35
10
-
10 -
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
Output load A
Output load A
Output load A
Output load B
Output load B
Output load B
Output load B
Output load A
Sept. 1992
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