XE88LC05 Datasheet, PDF (34/39 Pages) List of Unclassifed Manufacturers – 16 + 10 bit Data Acquisition Ultra Low-Power Microcontroller

Data Acquisition Microcontroller
XE88LC05
Table 9.2:
Note:
sym
description
min typ max
unit Comments
fm
phase margin
60
°
1
rl
resistive load
300
100000 ohm
4,5
cl
capacitive load
1
nF
CMR common mode input range
vss
vdd
V
OR
output range
vss+0.2
vdd-0.2
V
3
outp vr
outp pin voltage range
vss+2.3
vdd
V
voff
offset
±10
mV
noise
integrated input noise
100
uVrms
isourc
max source current
10
mA
4
PSRR power supply rejection ratio
40
dB
2
ibias
quiescent bias current
2
5
uA
5
ioff
off current
1
uA
Amplifier performances
1) For all possible combinations of resistive load and capacitive load.
2) At DC.
3) For voltage controlled bias control. For current controlled operation the voltage drop on the
pMOS output transistor has to be less than 200mV at maximum current.
4) Short circuit protection at ~80mA.
5) This amplifier must be loaded for correct operation. Ibias is without load current.
9.4 Signal DAC
The signal DAC is build around a programmable DAC and a buffer. It can generate fast (up to
64 kHz) or high resolution (resolution up to 16 bits) output. The output can be controlled in cur-
rent or voltage.
Figure 9.2:
General block diagram of the signal DAC
9.5 The amplifier of signal DAC
Table 9.3:
The amplifier can be used in several configurations. Therefore, it is not connected internally.
sym
gain
GBW0
cl0
GBW1
cl1
fm
rl
SR
CMR
OR
description
gain at DC
gain bandwidth product
capacitive load
gain bandwidth product
capacitive load
phase margin
resistive load
slew rate
common mode input range
output range
min typ max
80
25
5
125
200
55
5
10
vss-0.2
vdd-1.2
vss+0.2
vdd-0.2
unit
dB
kHz
nF
kHz
pF
°
kohm
kV/s
V
V
Comments
1
4
4
5
5
6
3
7
DAC signal amplifier performances
34
D0109-40