STP2200ABGA Datasheet, PDF (2/36 Pages) List of Unclassifed Manufacturers – Uniprocessor System Controller

STP2200ABGA
USC
Uniprocessor System Controller
BLOCK AND TYPICAL APPLICATION DIAGRAMS
UPA_ADDRBUS0[34:0]
UPA_ADR0_PAR0
UPA_ADDR0_VAL0[1:0]
UPA_SC_REQ0
UPA_REQIN0[1:0]
UPA_ADDRBUS1[28:0]
UPA_ADDR1_VAL1
UPA_PREPLY0[4:0]
UPA_PREPLY1[4:0]
UPA_PREPLY2[4:0]
SYS_RESET
X_BUTTON_RESET
P_BUTTON_RESET
UPA_RESET0
UPA_RESET1
UPA_XIR
EBUS_CS
EBUS_RD
EBUS_WR
EBUS_RDY
EBUS_ADDR[2:0]
EBUS_DATA[7:0]
CLK +
CLK –
PLL_BYPASS
Chip Boundary
Port Interface
Memory
Controller
EBus Interface
Data Path
Scheduler
JTAG
Clock/PLL
Figure 1. USC Block Diagram
MEMADDR[12:0]
RAS[3:0]
CAS[3:0]
WE
MRB_CTRL[1:0]
MWB_CTRL[1:0]
BMX_CMD[3:0] x2
UPA_SREPLY0[4:0]
UPA_SREPLY1[4:0]
UPA_SREPLY2[4:0]
UPA_ECC_VAL_0
UPA_DATA_STALL0
UPA_ECC_VAL_1
UPA_DATA_STALL1
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
2
July 1997