IC41C16105 Datasheet, PDF (16/18 Pages) List of Unclassifed Manufacturers – 1M X 16 (16-MBIT) DYNAMIC RAM WITH FAST PAGE MODE

IC41C16105
IC41LV16105
+*4 RE.RESH CYCLE (Addresses; WE, OE = DON'T CARE)
RAS
tRPC
tCP
UCAS/LCAS
I/O
tRP
tRAS
tCHR
tCSR
tRPC
tRP
tRAS
tCSR
tCHR
Open
HIDDEN RE.RESH CYCLE⁽¹⁾ (WE = HIGH; OE = LOW)
RAS
tCRP
UCAS/LCAS
tASR
ADDRESS
Row
I/O
OE
tRAS
tRCD
tRP
tRSH
tAR
tRAD
tRAH tASC
tRAL
tCAH
Open
Column
tAA
tRAC
tCAC
tCLZ
tOE
tORD
tRAS
tCHR
tOFF⁽²⁾
Valid Data
Open
tOD
Notes:
1. A Hidden Refresh may also be performed after a Write Cycle. In this case, WE = LOW and OE = HIGH.
2. tO.. is referenced from rising edge of RAS or CAS, whichever occurs last.
Don’t Care
S2-16
Integrated Circuit Solution Inc.
DR014-0A 06/07/2001