FDC37N958FR Datasheet, PDF (150/316 Pages) List of Unclassifed Manufacturers – Notebook I/O Controller with Enhanced Keyboard and System Control

KSTP_CLK Register
Host
N/A
8051
0x7F27
Power
VCC1
Default
0x10
D7
D6
D5
D4
D3
D2
D1
D0
KBCLK1 KBCLK0 KBCLK/ROSC ROSCEN
Note: ROSC refers to the ring oscillator.
STP_CNT[3:0]
STP_CNT[x]
This defines the number of machine cycles from
when the internal IRESET_OUT bit is cleared
until the external RESET_OUT pin goes inactive
low (deasserts) .
ROSCEN
This bit reflects the state of the ring oscillator
clock at all times. The 8051 can write this bit to
start or stop the ring oscillator. Other hardware
events can also start or stop this clock.
= 1 turn on ring oscillator
= 0 turn off ring oscillator
This bit is reset when the 8051 goes into
“SLEEP” mode and is set when the 8051 first
wakes up from “SLEEP” mode.
KBCLK/ROSC
This bit is used to control the clock source for
the 8051.
1 = 8051 clock source is KBCLK
0 = 8051 clock source is ring oscillator.
This bit is reset when the 8051 just wakes up
from the “SLEEP” mode
KBCLK1
KBCLK0
0
0
stop KBCLK (default)
0
1
KBCLK = 12 MHz
1
0
KBCLK = 14. 318 MHz
1
1
KBCLK = 16 MHz
SMSC DS – FDC37N958FR
Page 144
Rev. 09/01/99