GF9105A Datasheet, PDF (13/37 Pages) List of Unclassifed Manufacturers – MultiGENTM GF9105A Component Digital Transcoder

prime (´) indicates to which samples the H blanking will be applied. The HB₁ and HB₀ control bits (See Host Programming
Section) determine which of the four sets of blanking levels are selected.
HB₁ AND HB₀ CONTROL BITS
HB₁
HB₀
DESCRIPTION
0
0
Blanking levels of 64, 512, 512 and 64 applied to Y/G, C_B/B, C_R/R and KEY channels respectively.
0
1
Blanking levels of 64, 64, 64 and 64 applied to Y/G, C_B/B, C_R/R and KEY channels respectively.
1
0
Blanking levels of 0, 0, 0 and 0 applied to Y/G, C_B/B, C_R/R and KEY channels respectively.
1
1
Blanking levels of 0, 512, 512 and 0 applied to Y/G, C_B/B, C_R/R and KEY channels respectively.
INPUT OFFSET ADJUSTMENT
Following the Horizontal Blanking function, a fixed set of offsets may be added to the input data. The IOA₁ and IOA₀ control
bits (See Host Programming Section) specify which of the four possible input offset adjustments will be applied to the data.
As an example, the interpolation/decimation filters operate on two’s complement data, so for Y/C_B/C_R input, IOA₁ and IOA₀
should both be set low to remove the inherent offset from the incoming data.
IOA₁ AND IOA₀ CONTROL BITS
IOA₁
IOA₀
DESCRIPTION
0
0
Offsets of -64, -512, -512 and -64 added to the Y/G, C_B/B, C_R/R and KEY channels respectively.
0
1
Offsets of -64, -64, -64 and -64 added to the Y/G, C_B/B, C_R/R and KEY channels respectively.
1
0
Offsets of 0, 0, 0 and 0 added to the Y/G, C_B/B, C_R/R and KEY channels respectively.
1
1
Offsets of 0, -512, -512 and 0 added to the Y/G, C_B/B, C_R/R and KEY channels respectively.
FIR FILTERS
Following the Input Offset Adjustment, data is passed to the FIR filtering section of the device. These filters, when enabled,
will up-sample C_B and C_R data by a factor of two so that 4:2:2:4 data is sample-rate converted to 4:4:4:4 data. Subsequent
processing of co-sited Y, C_B and C_R samples may take place on such 4:4:4:4 data. The frequency response of these CCIR-
601 compliant FIR filters is shown in Figures 6a and 6b and the characteristics are listed in Figure 6c. In order to maintain
proper synchronization between all four channels of input data, the Y/G and KEY channels are passed through a digital delay
line that matches the FIR filter latency. Output resolution from the FIR filters depends on the state of the RND8/10 and
FIL_RND control bits (See Host Programming Section). RND8/10 should always be set to match the data format being output
by the device (high for 8 bit data or low for 10 bit data). FIL_RND should be set low unless the GF9105A is being used in a
mode where the 3X3 matrix is set for unity gain bypass mode. (See 3X3 Color Space Converter and KEY Scaler Section). In
this case, FIL_RND should be set high. The FIR filter only takes 10-bit input in interpolation mode and proper input offset has
to be used.
RND8/10 AND FIL_RND CONTROL BITS
RND8/10
FIL_RND
DESCRIPTION
0
0
Output has minimum rounding for high accuracy for a non-identity matrix, using 10-bit input data.
0
1
More rounding is performed to increase overall accuracy when matrix is being bypassed, using 10-bit
input data.
1
0
Output has minimum rounding for high accuracy for a non-identity matrix, using 8-bit input data.
1
1
More rounding is performed to increase overall accuracy when matrix is being bypassed, using 8-bit
input data.
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