CMI9738 Datasheet, PDF (9/36 Pages) List of Unclassifed Manufacturers – Integrated Multi-channel AC97

4. DIGITAL INTERFACE
CMI 9738
Integrated Multi-channel AC‘97
4.1 AC-LINK
All digital audio streams, optional modem line Codec streams, and command/status information
are communicated over this AC-Link. A breakout of the signals connecting the two is shown in
Figure .
Figure1. AC ‘97 connection to its companion controller
Digital
DC’97
Controller
SYNC
BIT_CLK
SDTA_OUT
SDATA_IN
RESET#
AC’97
Codec
XTAL_IN
XTAL_OUT
4.2 CLOCKING
CMI9738 derives its clock internally from an externally connected 24.576 MHz crystal or an
oscillator through the XTAL_IN pin. Synchronization with the AC’97 controler is achieved
through the BIT_CLK pin at 12.288 MHz half of crystal frequency .
The beginning of all audio sample packets, or Audio Frames, transferred over AC-link is
synchronized to the rising edge of the “SYNC” signal. “SYNC” is driven by the AC ’97
Controller. Data is transitioned on AC-link on everyrising edge of BIT_CLK, and subsequently
sampled on the receiving side of AC-link on each immediately followingfalling edge of
BIT_CLK.
4.3 RESETTING
There are three types of reset as detailed under “Timing Characteristics”
1. a cold reset where all CMI9738 logic (registers included) is initialized to its default state
2. a warm reset where the contents of the CMI9738 register set are left unaltered
3. a register reset which only initializes the CMI9738 registers to their default states
After signaling a reset to the CMI9738, the AC’97 Controller should not attempt to play or
capture audio data until it has sampled a “Codec Ready” indication via register 26h from the
CMI9738.
Notice When the AC-link “Codec Ready” indicator bit (SDATA_IN slot 0, bit 15) is a 1 it
indicates that the AC-link and AC ‘97 control and status registers are in a fully
operational state.
C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
TEL: [phone] FAX: [phone] E-mail:[e-mail]
Revision Date Apr./2002
Revision 1.1