CMI9738 Datasheet, PDF (31/36 Pages) List of Unclassifed Manufacturers – Integrated Multi-channel AC97

CMI 9738
Integrated Multi-channel AC‘97
7.6 AC-LINK LOW POWER MODE TIMING
Figure 14. AC-link low power mode timing diagram
Table 12. AC-link low power mode timing parameters
Parameter
Symbol Min Typ
End of Slot 2 to BIT_CLK, SDATA_IN low Ts2_pdown -
-
Max Units
1.0 us
7.7 ATE TEST MODE
Figure 15. ATE test mode timing diagram
Table 13. ATE test mode timing parameters
Parameter
Symbol Min Typ Max Units
Setup to trailing edge of RESET# (also applies to SYNC) Tsetup2rst 15.0 -
- ns
Rising edge of RESET# to Hi-Z delay
Toff
-
- 25.0 ns
Notes:
nAll AC-Link signals are normally low through the trailing edge of RESET#. Bringing
SDATA_OUT high for the trailing edge of RESET# causes CMI9738’s AC-Link outputs
to go high impedance which is suitable for ATE in circuit testing.
oOnce either of the two test modes have been entered, the CMI9738 must be issued another
RESET# with all AC-Link signals low to return to the normal operating mode.
# denotes active low.
C-MEDIA Electronics Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan, R.O.C. 106
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Revision Date Apr./2002
Revision 1.1