PD64012 Datasheet, PDF (8/16 Pages) List of Unclassifed Manufacturers – 12-channel PoE Manager

Automatic mode – in this mode the PD64012 PoE
Managers communicate with the host CPU, through
an isolated I²C bus. The PD64012 SPI bus is
dedicated for internal communication among
PD64012s (for power management), as illustrated in
Figure 4.
Anyone of the devices (for example, PD64012 #00)
may be configured as Master, while the others are
Slaves. This Master/Slave configuration only affects
the Serial Peripheral Interface (SPI) bus. It is critical
that only one of them be set-up as a Master, with the
others acting as Slaves, in order to avoid SPI clock
and data I/Os contentions.
PD64012
12-CHANNEL PoE MANAGER
SDA
HOST
CPU
SCL
I/O Opto
I²C BUS
Input Opto
SDA
SCL
SPI BUS
CS[0:1]_N
PD64012 _SCK
#00
MOSI
Master MISO
SDA
SCL
PD64012 ^SCK
#01
MOSI
Slave ^MISO
SDA
SCL
PD64012 ^SCK
#10
MOSI
Slave ^MISO
SDA
SCL
PD64012 ^SCK
#11
MOSI
Slave ^MISO
Figure 4: Automatic Mode
Mode Configuration Method
The PoE Manager’s configuration is done via the ASIC_INI pin, according to the following table.
The ASIC_INI analog signal is converted into a 10-bit register (A/D). Once a hard Reset pulse is detected, the data
is latched into an internal mode register.
MODE NAME
ASIC_INI
VOLTAGE LEVEL
ASIC_INI INTERNAL A/D
REGISTER
Enhanced mode
0.31 to 0.63 V
001
Auto mode – Slave 1
0.63 to 0.94 V
010
Auto mode – Slave 2
0.94 to 1.25 V
011
Auto mode – Slave 3
1.25 to 1.56 V
100
Auto mode - Master
2.19 to 2.5 V
111
Notes:
In the Auto mode – the PD64012 is communicating with the host via I²C.
In the Enhanced mode – the PD64012 is communicating with the controller via SPI.
I²C 2 LSB ADDRESS
(set internally)
00
01
10
11
00
Block Diagram Description (see Figure 5)
The PD64002 PoE Manager complies with all requirements of IEEE standard 802.3af-2003, for detection. The
device has been designed around two major sections:
1. A common Digital section, that serves all 12 channels
2. Twelve separate and identical channels for driving ports.
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06-0003-058 (Rev. 2.8) / 5 August 2004
© PowerDsine 2003
Information in this document subject
to change without prior notice.