ICS87608I Datasheet, PDF (8/12 Pages) List of Unclassifed Manufacturers – LOW VOLTAGE/LOW SKEW, 1:8 PCI/PCI-X ZERO DELAY CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
ICS87608I
LOW VOLTAGE/LOW SKEW, 1:8 PCI/PCI-X
ZERO DELAY CLOCK GENERATOR
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS87608I provides sepa-
rate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V_DD, V_DDA, and V_DDOX
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10µF and a .01μF bypass
capacitor should be connected to each V_DDA.
3.3V
V
DD
.01μF 10Ω
V_DDA
.01μF
10 μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS87608I has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 25MHz, 18pF parallel
resonant crystal and were chosen to minimize the frequency
ppm error. The optimum C1 and C2 values can be slightly ad-
justed for optimum frequency accuracy.
X1
18pF Parallel Cry stal
XTAL2
C1
22p
XTAL1
C2
22p
Figure 2. CRYSTAL INPUt INTERFACE
87608AYI
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8
REV. B MARCH 11, 2005