CMA8864-04 Datasheet, PDF (8/9 Pages) List of Unclassifed Manufacturers – I2C, Mixed Voltage clock Synthesizer with Buffer for PENTIUMTM & II CPU/PCI system

Ver. 1.2
6F, No. 100, Sec. 4, Civil Boulevard, Taipei, Taiwan
TEL: [phone] FAX: [phone]
WWW : http://www.cmedia.com.tw
DC CHARACTERISTICS
SYMBOL
PARAMETER
Idd
Dynamic Supply Current
Vil
Input Low Voltage
Vih
Input High Voltage
Iil
Voh2
Vol2
Voh3
Input Leakage Current
2.5V Output High Voltage
2.5V Output Low Voltage
3.3V Output High Voltage
Vol3
3.3V Output Low Voltage
Vpoh PCI bus Output High Voltage
Vpol PCI bus Output High Voltage
Ioz
Tristate Leakage Current
Isc
Short Circuit Current
MIN. MAX. UNIT
-
TBD mA
VSS-0.3 0.8 VDC
2.0 VDD-0.3 VDC
-5
+5
uA
2.0
-
V
-
0.4
V
2.4
-
V
-
0.4
V
2.4
-
V
-
0.55
V
-
10
uA
25
-
mA
CONDITION
CPU=66.6MHz, PCI=33.3MHz
VDD=3.3V¡ Ó5%
0<Vin<VDD
VDDL=2.375V to 2.9V, Ioh=-1mA
VDDL=2.375V to 2.9V, Iol=1mA
VDD3=3.3V¡ Ó5%, Ioh=-1mA
VDD3=3.3V¡ Ó5%, Iol=1mA
VDD2=3.3V¡ Ó5%, Ioh=-1mA
VDD2=3.3V¡ Ó5%, Iol=1mA
1 output at a time - 30 seconds
AC CHARACTERISTICS
SYMBOL
PARAMETER
T T _{Hrise, Hfall}
T_HCP
T_HCH
T_HCL
Duty Cycle
Host clock Rise and Fall Time
Host Clock Period
Host Clock High Time
Host Clock Low Time
Duty cycle
T_HSKW
T_JAB
T_STB
Buffer out Skew All Host CLK
Jitter absolute, Host clock
Host/PCI clock stabilization
from power-up
Toff
Host to PIC Offset
T_HSSKW
T_PCP
T_PCH
T_PCL
T_PSKW
Iol
Host to SDRAM skew
PCI clock period
PCI clock High Time
PCI clock Low Time
Buffer out skew all PCICLK
Switching Current Low
Ioh
Switching Current High
MIN.
0.4
15/16.7
5.2/6.0
5.0/5.8
45
-
-
-
1.0
-
30/33.3
12/13.3
12/13.3
-
TBD
TBD
Typ.
-
-
50
-
-
-
-
-
-
-
-
-
60
60
MAX. UNIT
CONDITION
1.6 ns 20pf load/CPU and PCI outputs
-
ns Measured at 1.25V, 66/60MHz
-
ns Measured at 2.0V, 66/60MHz
-
ns Measured at 0.4V, 66/60MHz
55 % Refer to Notes below
250 ps Refer to Notes below
250 ps Refer to Notes below
3 ms Refer to Notes below,
VDDL=3.3V
4.0 ns Refer to Notes below
250 ps Refer to Notes below
-
ns Measured at 1.5V, 66/60MHz
-
ns Measured at 2.4, 66/60MHz
-
ns Measured at 0.4, 66/60MHz
500 ps Refer to Notes below
TBD mA Vol=1.5V
TBD mA Voh=1.5V
Notes : Clock period, Jitter, Offset and skew are measured on the rising edge clocks at 1.25V for the 2.5V
clocks and 1.5V for the 3.3V clocks.
CMEI
8
CMA8864-04