 English |
|
|
|
|
|
|
|
| CM8500 Datasheet, PDF (8/13 Pages) List of Unclassifed Manufacturers – 3A BUS TERMINATOR | |||
| |||
| ◁ |
CM8500TEVAL PCB LAYOUT
CM8500
3A BUS TERMINATOR
Figure 4. CM8500EVAL PCB Layout
SSTL-2 SPECIFICATIONS
SYMBOL
PARAMETER
VDD
Device Supply Voltage
VDDQ
Output Supply Voltage
VREF
Input Reference Voltage
VTT
Termination Voltage
INPUT DC LOGIC LEVELS
VIH (DC)
DC Input Logic High
VIL (DC)
DC Input Logic Low
INPUT AC LOGIC LEVELS
VIH (AC)
AC Input Logic High
VIL (AC)
AC Input Logic Low
OUTPUT DC CURRENT DRIVE
IOH (DC)
Output Minimum Source DC Current
IOL (DC)
Output Minimum Sink DC Current
MIN
VDDQ
2.3
1.15
VREF - 0.04
VREF + 0.18
- 0.3
VREF + 0.35
- 15.2
15.2
TYP
2.5
1.25
VREF
Notes:
VREF and VTT must track variations in VDDQ
Peak-to-peak AC noise on VREF may not exceed 2% VREF (DC)
VTT of transmitting device must track VREF of receiving device
Table 1. Key Specifications for SSTL_2
MAX
N/A
2.7
1.35
VREF + 0.04
VDDQ + 0.3
VREF - 0.18
VREF - 0.35
UNITS
V
V
V
V
V
V
V
V
mA
mA
2004/06/01 Rev. 1.1
Champion Microelectronic Corporation
Page 8
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese