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OC-3 Datasheet, PDF (6/10 Pages) List of Unclassifed Manufacturers – 1310 nm Single-mode Transceiver (S1.1) 1x9, SC Duplex Connector, 3.3 V
1310 nm Single-mode Transceiver (S1.1)
1x9, SC Duplex Connector, 3.3 V
155 Mbps ATM/SONET OC-3/SDH STM-1
Connection Diagram
Pin-Out
1. RX GND
2. RD+
3. RD−
4. SD
5. VCCR
6. VCCT
7. TD−
8. TD+
9. TX GND
N/C
TOP VIEW
N/C
PIN SYMBOL
DESCRIPTION
1
RX GND
Receiver Signal Ground.
Directly connect this pin to the receiver ground plane.
RD+ is an open-emitter output circuit.
2
RD+ Terminate this high-speed differential LVPECL output with standard LVPECL techniques at the
follow-on device input pin. (See recommended circuit schematic)
RD– is an open-emitter output circuit.
3
RD− Terminate this high-speed differential LVPECL output with standard LVPECL techniques at the
follow-on device input pin. (See recommended circuit schematic)
Signal Detect.
Normal optical input levels to the receiver result in a logic “1” output, VOH, asserted. Low input optical
levels to the receiver result in a fault condition indicated by a logic “0” output VOL, deasserted Signal
4
SD
Detect is a single-ended LVPECL output. SD can be terminated with LVPECL techniques via 50 Ω to
VCCR − 2 V. Alternatively, SD can be loaded with a 180 Ω resistor to RX GND to conserve electrical
power with small compromise to signal quality. If Signal Detect output is not used, leave it
open-circuited. This Signal Detect output can be used to drive a LVPECL input on an upstream circuit,
such as, Signal Detect input or Loss of Signal-bar.
Receiver Power Supply.
5
VCCR Provide +3.3 Vdc via the recommended receiver power supply filter circuit. Locate the power supply
filter circuit as close as possible to the VCCR pin.
Transmitter Power Supply.
6
VCCT Provide +3.3 Vdc via the recommended transmitter power supply filter circuit. Locate the power supply
filter circuit as close as possible to the VCCT pin.
Transmitter Data In-Bar.
7
TD− Terminate this high-speed differential LVPECL input with standard LVPECL techniques at the
transmitter input pin. (See recommended circuit schematic)
Transmitter Data In.
8
TD+ Terminate this high-speed differential LVPECL input with standard LVPECL techniques at the
transmitter input pin. (See recommended circuit schematic)
Transmitter Signal Ground.
9 TX GND Directly connect this pin to the transmitter signal ground plane. Directly connect this pin to the
transmitter ground plane.
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Date: 2003/02/17