MTD655 Datasheet, PDF (6/18 Pages) List of Unclassifed Manufacturers – 5 Port 10M/100M Hub With 2 port Switch

MYSON
TECHNOLOGY
MTD655
10M Inter-Bus Interface pins
Name
ICLK10
IDAT10
Pin Number I/O
Descriptions
83
I/O 10M Inter-Bus port clock.
81
I/O 10M Inter-Bus port data bit
100M Inter-Bus Interface pins
Name
IACKB100
Pin Number
75
ICOLB100
76
IREQ100_IN0
79
IREQ100_IN1
78
IREQ100_IN2
77
IREQ100_OUT
80
ICLK100
73
IDAT100_0
71
IDAT100_1
70
IDAT100_2
69
IDAT100_3
68
I/O
Descriptions
I/O 100M Inter-Bus port access acknowledge signal (low active). For master
hub, this pin is output; for slave hub is input, or while EXT_ARB
jumper was set to “1”, this pin is input from an external arbitration
device.
I/O 100M Inter-Bus collision signal (low active). For master hub, this pin
can output multi hub collision event to inform all slave hub ; for slave
hub, this pin is an input, or while EXT_ARB jumper was set to “1”, this
pin is input from an external arbitration device.
I 100M Inter-Bus port access request input.
I 100M Inter-Bus port access request input.
I 100M Inter-Bus port access request input.
O 100M Inter-Bus port access request output.
I/O 100M Inter-Bus port clock.
I/O 100M Inter-Bus port data bit 0.
I/O 100M Inter-Bus port data bit 1.
I/O 100M Inter-Bus port data bit 2.
I/O 100M Inter-Bus port data bit 3.
Name
LEDDAT
Pin Number
124
LED Interface Pins
I/O
Descriptions
I/O LED display serial data out; mapping for LEDCLK signal’s burst clock
, its serial out data sequence is : ( first bit be shifted out is from b00, and
end of burst bit is b23)
b00: *********** b08: 10hub_col
b16: ************
b01: ********** b09: 100hub_col
b17: ************
b02: ********** b10: asram_test_fail b18: ************
b03: port0 partition
b04: port1 partition
b05: port2 partition
b06: port3 partition
b07: port4 partition
b11: port0 partition
b12: port1 partition
b13: port2 partition
b14: port3 partition
b15: port4 partition
b19: port0 rx_activity
b20: port1 rx_activity
b21: port2 rx_activity
b22: port3 rx_activity
b23: port4 rx_activity
LEDCLK
I/O LED display clock signal, the signal is a discontinued clock for LED
125
data serial shift out. Every clock burst have 24 cycles ( period : 160 ns),
and the clock burst will be repeated with every 42ms.
6/18
MTD655 Revision 2.0 17/03/2000