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HM17CM4096 Datasheet, PDF (59/67 Pages) List of Unclassifed Manufacturers – 128XRGBX162 OUTPUT LCD DRIVER IC with built-in RAM
• SYSTEM BUS READ / WRITE TIMING (68 series CPU interface)
(write timing
F
tAS6
tAH6
CS
RS
R/W
(WR)
HM17CM4096
E
(RD)
tEHW6
tELW6
tDS6
tDH6
D0 ∼ D15
ITEM
Address hold timing
Address setup timing
System cycle timing
Enable ”L” pulse width
Enable ”H” pulse width
Data setup timing
Data hold timing
ITEM
Address hold timing
Address setup timing
System cycle timing
Enable ”L” pulse width
Enable ”H” pulse width
Data setup timing
Data hold timing
tCYC6
SYMBOL
tAH6
tAS6
tCYC6
tELW6
tEHW6
tDS6
tDH6
CONDITION
MIN.
0
0
90
35
35
40
5
SYMBOL
tAH6
tAS6
tCYC6
tELW6
tEHW8
tDS6
tDH6
CONDITION
MIN.
0
0
160
70
70
50
5
ITEM
SYMBOL CONDITION
Address hold timing
tAH6
Address setup timing
tAS6
System cycle timing
Enable ”L” pulse width
Enable ”H” pulse width
tCYC6
tELW6
tEHW8
Data setup timing
tDS6
Data hold timing
tDH6
notice) All timing reference is 20% and 80% of VDD and 80%.
MIN.
0
0
180
80
80
70
10
(VDD=2.5∼3.3V, Ta=-30∼+85°C)
MAX. UNIT
PORT
ns
CS
ns
RS
ns
ns
ns
E
ns
ns
D0 ∼ D15
(VDD=2.2∼2.5V, Ta=-30∼+85°C)
MAX. UNIT
PORT
ns
CS
ns
RS
ns
ns
ns
E
ns
ns
D0 ∼ D15
(VDD=1.7∼2.2V, Ta=-30∼+85°C)
MAX. UNIT
PORT
ns
CS
ns
RS
ns
ns
ns
E
ns
ns
D0 ∼ D15
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