H4005 Datasheet, PDF (5/6 Pages) List of Unclassifed Manufacturers – ISO 11 784 / 11 785 COMPLIANT READ ONLY CONTACTLESS IDENTIFICATION DEVICE

EM MICROELECTRONIC-MARIN SA
H4005
Memory organisation
The structure of the 128 bits is as follows :
The header is sent first and is used to identify the start of the sequence. It is composed of 11 bits having a bit pattern which is
unique in the data stream. 00000000001
The header is followed by the Identification code which is composed of 64 bits organised in 8 blocks of 8 bits. Each block of
8 bits is trailed by a control bit set to logic "1" to prevent that the header is reproduced in the data. Bit 64 is transmitted first.
Bit 1 is a flag for animal "1" or non-animal "0" application.
Bits 2-15 are a reserved code for future use.
Bit 16 is a flag for additional data block "1" or no additional data block "0".
Bits 17-26 ISO 3166 Numeric country code
Bits 27-64 National identification code
The next two 8 bit blocks contain the 16 CRC-CCITT error detection bits. LSB is transmitted first, and the 2 block are trailed
with with a binary "1".
The data stream with 3 blocks of 8 bits trailed with a logical "1" representing the extension bits. The extension bits are
planned for future extension in which for instance information from sensors or contents of trailing pages may be stored. In the
current version the standard coding will be 000000001 000000001 000000001 and the flag bit 16 of the identification code
"0".
Resonance Capacitor
The Resonance Capacitor is integrated, and its value is typically 75 pF.
Typical Capacitor Variation
versus Temperature
Cr Tolerance [%]
100.3
100.2
100.1
100.0
99.9
99.8
99.7
-50
-30 -10 10
30
50
70
Temperature [°C]
100.7
90
Fig. 6
Pad Description
Pad Name
Function
1 COIL2
2 COIL1
3 VDD
4 VSS
Coil Terminal 2 / Data output
Coil Terminal 1 / Clock input
Positive Internal Supply Voltage
Negative Internal Supply Voltage
1
4
2
3
Table 5
5