MSP3405D Datasheet, PDF (46/71 Pages) List of Unclassifed Manufacturers – Multistandard Sound Processors

MSP 34x5D
PRELIMINARY DATA SHEET
7.5.3. DC Level Register
DC Level Readout
FM1 (MSP-Ch2)
DC Level Readout
FM2 (MSP-Ch1)
DC Level
001B_hex
H+L
001C_hex
H+L
[8000_hex ... 7FFF_hex]
values are 16 bit two’s
complement
The DC level register measures the DC component of
the incoming FM signals (FM1 and FM2). This can be
used for seek functions in satellite receivers and for IF
FM frequencies fine tuning. A too low demodulation fre-
quency (DCO) results in a positive DC-Level and vice
versa. For further processing, the DC content of the de-
modulated FM signals is suppressed. The time constant
τ, defining the transition time of the DC Level Register,
is approximately 28 ms.
7.5.4. MSP Hardware Version Code
Hardware Version
Hardware Version
MSP 34x5D – A2
MSP 34x5D – B3
001E_hex
H
[00_hex ... FF_hex]
01_hex
02_hex
A change in the hardware version code defines hard-
ware optimizations that may have influence on the chip’s
behavior. The readout of this register is identical to the
hardware version code in the chip’s imprint.
7.5.5. MSP Major Revision Code
Major Revision
MSP 34x5D
001E_hex
L
04_hex
The MSP 34x5D is the fourth generation of ICs in the
MSP family.
7.5.6. MSP Product Code
Product
MSP 3405D
MSP 3415D
001F_hex
H
05_hex
0F_hex
By means of the MSP-Product Code, the control proces-
sor is able to decide whether or not NICAM-controlling
should be accomplished.
7.5.7. MSP ROM Version Code
ROM Version
Major software revision
MSP 34x5D – A2
MSP 34x5D – B3
001F_hex
L
[00_hex ... FF_hex]
22_hex
23_hex
A change in the ROM version code defines internal soft-
ware optimizations, that may have influence on the
chip’s behavior, e.g. new features may have been in-
cluded. While a software change is intended to create no
compatibility problems, customers that want to use the
new functions can identify new MSP 34x5D versions ac-
cording to this number.
To avoid compatibility problems with the MSPB series,
an offset of 20_hex is added to the ROM version code of
the chip’s imprint.
46
Micronas