ES3880 Datasheet, PDF (4/4 Pages) List of Unclassifed Manufacturers – Video CD MPEG Processor

Table 1 ES3880 Pin Descriptions List (Continued)
Name
Number
I/O
TDMDR
97
I TDM serial data receive.
TDMFS
98
I TDM frame sync.
CAS#
99
O DRAM column address strobe.
BLOCK DIAGRAM
Figure 3 provides a functional block diagram of the
ES3880.
Definition
ES3880 PRODUCT BRIEF
BLOCK DIAGRAM
Processor
Interface
LA[17:0]
LD[7:0]
LCS3#, LCS#[1:0]
LWR#
LOE#
Serial
Audio
Interface
ACLK
ATCLK
AIN
AOUT
ARFS
ATFS
ARCLK
TDM
SEL_PLL[1:0]
Interface
TDMCLK
TDMDR
TDMFS
RISC
Processor
Serial Audio
Interface
TDM
Interface
Huffman
Decoder
DRAM Interface
2Kx32 ROM
512x32 SRAM
64x32 ROM
32x32 SRAM
Registers
MPEG
Processor
Video Output
On Screen
Display
DRAM DMA
Controller
Figure 3 ES3880 Functional Block Diagram
ORDERING INFORMATION
Part Number
ES3880
Description
Video CD MPEG Processor
Package
100-pin PQFP
RAS#
DA[9:0]
DBUS[15:0]
DOE#
DWE#
CAS#
DRAM
AUX[7:0]
AUX
YUV[7:0]
PCLK2X
PCLK
VSYNC
HSYNC
CPUCLK
RESET#
Screen
Display
Misc.
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otherwise, without the prior written permission of ESS
Technology, Inc.
ESS Technology, Inc. makes no representations or
warranties regarding the content of this document.
All specifications are subject to change without prior
notice.
ESS Technology, Inc. assumes no responsibility for any
errors contained herein.
(P) U.S. Patent 4,384,169 and others, other patents
pending.
SmartScale™, SmartStream™, and VideoDrive™ are
trademarks of ESS Technology, Inc.
MPEG is the Moving Picture Experts Group of the ISO/
IEC. References to MPEG2 in this document refer to the
ISO/IEC 13818-1.
All other trademarks are owned by their respective
holders and are used for identification purposes only.
4
© 2000 ESS Technology, Inc. All rights reserved.
SAM0191-052901