ES1988 Datasheet, PDF (4/6 Pages) List of Unclassifed Manufacturers – PCI Audio-Modem Accelerator Product Brief

ES1988 PRODUCT BRIEF
Table 1 ES1988 Pin Descriptions (Continued)
Names
Pin Numbers
I/O
GD[3]
I/O
ECLK
VOLDN#
O
45
I
GD[4]
GD[5:7]
GPIO[13:15]
I2SCLK
SIRQ#
GPIO4
I2SLR
GTO#
GSO
46
I
I
47:49
I/O
I
50
I/O
I/O
I
O
51
O
GPIO5
I2SDATA
R0#
GPIO6
MC_97DI
PCREQ#
VOLUP#
I/O
I
I
52
I/O
I
O
53
I
GPIO7
PME#
SPDIFO
PCGNT#
VOLDN#
I/O
O
O
54
I
I
VAUX
I
55
Descriptions
Game port data input/output.
Clock output to EEPROM clock input. ECLK goes active after power-on reset and goes inactive
automatically after EEPROM cycle is complete.
Hardware volume control (volume down). Used in combination with pin 44 (VOLUP#). Hardware
volume control is enabled by setting PCI 52 [7] = 1. Pins 44:45 are selected for hardware volume
control by setting PCI 52h [5] = 1. Pins 53:54 may also be used for hardware volume control.
Game port data input.
Game port data input.
General-purpose input/output.
I²S serial clock input. I²S input is enabled by setting Allegro_Base+37h [15] = 1.
Serial interrupt request. Optional PC/PCI system implementation. Serial IRQ is enabled by
setting PCI 40h [14] = 1.
General-purpose input/output.
I²S frame sync input. I²S input is enabled by setting Allegro_Base+37h [15] = 1.
Grant to PCI master. GTO# is enabled by setting PCIx2 arbiter bits PCI 58h [0] = 1 and PCI 58h
[11] = 1. Select GT0#/GSO from pin 51 by enabling PCI 58h [10] = 0. Pin 63 may also be used as
GT0#/GSO.
Grant select 0 output to control external quick switch to grant PCI master phase. GSO is enabled
by setting PCIx2 arbiter bit PCI 58h [0] = 1 and PCI 58h [11] = 0. Select GS0/GT0# from pin 51
by enabling PCI 58h [10] = 0. Pin 63 may also be used as GT0#/GSO.
General-purpose input/output.
I²S data input. I²S input is enabled by setting Allegro_Base+37h [15] = 1.
PCI bus request 0 input from external PCI master device. RO# is enabled by setting the PCIx2
arbiter bit PCI 58h [0] = 1. Select R0# from pin 52 by enabling PCI 58h [10] = 0. Either pin 2 or
pin 52 may be used for R0#.
General-purpose input/output.
Modem codec data input. Enabled by setting Allegro_Base+38h [3] = 1.
PC/PCI request output. Enable PCREQ# by setting PCI 50h [10:8] = 010. Pin 53 is used as
PCREQ# when configured as an audio-only device. PCREQ# can only be used from pin 2 when
configured as a multifunction device (see pin 60 note).
Hardware volume control (volume up). Used in combination with pin 54 (VOLDN#). Hardware
volume control is enabled by setting PCI 52 [7] = 1. Pins 53:54 are selected for hardware volume
control by setting PCI 52h [5] = 0. Pins 44:45 may also be used for hardware volume control.
General-purpose input/output.
PME# output to wake the system. PME is enabled by setting the PME_EN bit (PCI C5h [0] = 1).
S/PDIF output. Enable SPDIFO by setting PCI 53h [0] = 1. Select SPDIFO from pin 54 by setting
PCI 58h [1] = 0. Either pin 2 or pin 54 may be used for SPDIFO.
PC/PCI grant input. Enable PC/PCI by setting PCI 50h [10:8] = 010. Select PCGNT# from pin 54
by setting Allegro_Base+58h [6] = 1. Either pin 54 or pin 63 may be used for PCGNT#.
Hardware volume control (volume down). Used in combination with pin 53 (VOLUP#). Hardware
volume control is enabled by setting PCI 52 [7] = 1. Pins 53:54 are selected for hardware volume
control by setting PCI 52h [5] = 0. Pins 44:45 may also be used for hardware volume control.
3.3V V_AUX voltage supply input. If V_AUX is not supported, then V_AUX (pin 55) should be con-
nected to VCC and V_AUXD (pin 62) should be pulled down.
4
SAM0368-030601
ESS Technology, Inc.