C8254 Datasheet, PDF (4/6 Pages) List of Unclassifed Manufacturers – PROGRAMMABLE TIMER /COUNTER MEGAFUNCTION

CAST C8254 Megafunction Datasheet
Read/Write
Control
Control
Word
Upper/Lower
Byte
Controller
MSB-CNTREG
CRM
LSB-CNTREG
CRL
Control
Logic
8-Bit
Status
Register
16-Bit Counter
CE16
16-Bit Output Latch
OLREG
CLK# OUT#
GATE#
Upper/Lower
Byte
Controller
Read
Counter
Controller
Figure 2 – Internal Counter Block Diagram
Counter 0, Counter 1, Counter 2
These three functional blocks are identical in operation, so only a single Counter will be described. The
internal block diagram of a single counter is shown in Figure 2. The Counters are fully independent. Each
Counter may operate in a different Mode.
Control Logic
This block controls the 16-bit counter for all counting modes and the Null flag of the counter.
Upper/Lower Byte Controller
The width of the data bus is 8 bits, and the counter is 16 bits. The Upper/Lower Byte Controller allows one 8-
bit Counter Register, MSB or LSB, to be loaded one at a time from the internal bus. If the Counter is
programmed for two-byte read/write mode, this block will control which data byte will be read at the next
read cycle.
Counter Registers
There are two 8-bit registers called CRM and CRL. Both are normally referred to as one unit and called just
CR. When a new count is written to the Counter, the count is stored in the CR and later transferred to the
CE16. At the rising-edge of WRN, it will write data to the register. One register at a time will be allowed to be
loaded from the internal bus. After both registers have been loaded, both bytes are transferred to the CE16
simultaneously. CRM and CRL are cleared when the Counter is programmed.
Note that the CE16 can’t be written into; whenever a count is written, it is written into the CR.
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