LM3S601_06 Datasheet, PDF (352/397 Pages) List of Unclassifed Manufacturers – Microcontroller

Quadrature Encoder Interface (QEI)
16.3
Initialization and Configuration
The following example shows how to configure the Quadrature Encoder module to read back an
absolute position:
1. Enable the QEI clock by writing a value of 0x00000100 to the RCGC1 register in the System
Control module.
2. In the GPIO module, enable the appropriate pins for their alternate function using the
GPIOAFSEL register.
3. Configure the quadrature encoder to capture edges on both signals and maintain an absolute
position by resetting on index pulses. Using a 1000-line encoder at four edges per line, there
are 4000 pulses per revolution; therefore, set the maximum position to 3999 (0xF9F) since the
count is zero-based.
– Write the QEICTL register with the value of 0x00000018.
– Write the QEIMAXPOS register with the value of 0x00000F9F.
4. Enable the quadrature encoder by setting bit 0 of the QEICTL register.
5. Delay for some time.
6. Read the encoder position by reading the QEIPOS register value.
16.4
Register Map
Table 16-1 lists the QEI registers. All addresses given are relative to the QEI base address of
0x4002C000.
Table 16-1. QEI Register Map
Offset Name
0x000
0x004
0x008
0x00C
0x010
0x014
0x018
0x01C
0x020
0x024
0x028
QEICTL
QEISTAT
QEIPOS
QEIMAXPOS
QEILOAD
QEITIME
QEICOUNT
QEISPEED
QEIINTEN
QEIRIS
QEIISC
Reset
Type Description
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
R/W
RO
R/W
R/W
R/W
RO
RO
RO
R/W
RO
R/W1C
Configuration
Status
Current encoder position
Maximum encoder position
Load value for the velocity timer
Current value of the velocity timer
Current count of encoder pulses
Velocity of the quadrature encoder
Interrupt enables
Raw interrupt status
Interrupt status and clear
See
page
353
355
356
357
358
359
360
361
362
363
364
16.5
Register Descriptions
The remainder of this section lists and describes the QEI registers, in numerical order by address
offset.
352
October 8, 2006
Preliminary