TC5747 Datasheet, PDF (33/44 Pages) List of Unclassifed Manufacturers – Single Chip CMOS Imager with Integrated Image Signal Processor and JPEG Codec

TC5747 Preliminary Data Sheet
Single Chip CMOS Imager
4.2.9.2 SSI Mode
The serial interface consists of three pins:
DSCLK – Data Serial Clock output pin
DSDAT – Serial Data output pin.
DSFRM – Frame signal in early-frame mode
The TC5747 acts as a master of the interface. It activates the Frame signal one clock period before there is
valid data to be sent out. Transfer datum size configurable. There are three options:
Transfer datum size is a single byte.
Transfer datum size is a single line (size is according to output image size and output mode).
Transfer datum size is a single image. This configuration can be used only in a mode that combines the
SSI-mode with the clock-qualify mode.
DSFRM Signal
The DSFRM signal notifies of a transfer of a complete data unit. There are three configurations, as described
below.
Single Byte Transfer Mode
The 8 bits of the transfer byte are sent out on the eight following effective edges of the DSCLK signal. When
the last bit of the byte is sent out, the DSFRM signal may be active again. If it is active, the following byte
transfer begins on the next effective edge of DSCLK.
Figure 20: Single Byte Transfer Mode
Image-line Transfer Mode
In this mode, DSFRM is activated one clock before the continuous transfer of a complete image line. Transfer
size should be configured on the receiving side according to the image line size, taking into consideration
the SAV and EAV markers, if used.
Frame Transfer Mode
In this mode, the DSFRM signal is activated once in a frame, one clock cycle before the first byte of the
image is transferred out.
The DSFRM signal duration is also configurable, to be of one clock cycle duration, or to be active until the
last byte of data in the transfer is transmitted. The second mode can be used to generate an interrupt inside
the receiving device, once the complete data has been transferred.
TransChip ©
27