ICM202B Datasheet, PDF (33/36 Pages) List of Unclassifed Manufacturers – CIF/QCIF CMOS image sensor with digital YUV output

ICM202B CIF/QCIF CMOS sensor with digital YUV output
Data Sheet V2.0, February 2003
Pixel Clock Duty Cycle
In different frame rate mode (controlled by PART_CONTROL[6:3]), the duty cycle (high time / clock
period) of the PCLK signal is described in the following table:
Frame Rate
30
15
10
6
5
3
2
1
Duty Cycle
50.0%
50.0%
66.6%
60.0%
50.0%
50.0%
53.3%
50.0%
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page 33
2/5/2003
Confidential