MC2400 Datasheet, PDF (31/59 Pages) List of Unclassifed Manufacturers – Navigator Motion Processor

5.4 Pin description tables
5.4.1 I/O chip
Pin Name and number Direction
HostCmd
81
Input
HostRdy
8
Output
~HostRead 92
Input
~HostWrite
100
Input
~HostSlct
94
Input
CPIntrpt
77
Output
CPR/~W
53
Input
CPStrobe
54
Input
CPPeriphSlct 52
CPAddr0
41
CPAddr1
43
CPAddr15
50
MasterClkIn 89
CPClk
24
Input
Input
Input
Output
I/O Chip
Description
This signal is asserted high to write a host instruction to the Motion
Processor, or to read the status of the HostRdy and HostIntrpt signals. It is
asserted low to read or write a data word.
This signal is used to synchronize communication between the Motion
Processor and the host. HostRdy will go low (indicating host port busy) at
the end of a read or write operation according to the interface mode in
use, as follows:
Interface Mode HostRdy goes low
8/8
after the instruction byte is transferred
after the second byte of each data word is transferred
8/16
after the second byte of the instruction word
after the second byte of each data word is transferred
16/16
after the 16-bit instruction word
after each 16-bit data word
serial
n/a
HostRdy will go high, indicating that the host port is ready to transmit,
when the last transmission has been processed. All host port
communications must be made with HostRdy high (ready).
A typical busy-to-ready cycle is 12.5 microseconds, but can be
substantially longer, up to 100 microseconds.
When ~HostRead is low, a data word is read from the Motion Processor.
When ~HostWrite is low, a data word is written to the Motion Processor.
When ~HostSlct is low, the host port is selected for reading or writing
operations.
I/O chip to CP chip interrupt. This signal sends an interrupt to the CP
chip whenever a host–chipset transmission occurs. It should be
connected to CP chip pin 53, I/OIntrpt.
This signal is high when the I/O chip is reading data from the I/O chip,
and low when it is writing data. It should be connected to CP chip pin 4,
R/W.
This signal goes low when the data and address become valid during
Motion Processor communication with peripheral devices on the data
bus, such as external memory or a DAC. It should be connected to CP
chip pin 6, Strobe.
This signal goes low when a peripheral device on the data bus is being
addressed. It should be connected to CP chip pin 130, PeriphSlct.
These signals are high when the CP chip is communicating with the I/O
chip (as distinguished from any other device on the data bus). They
should be connected to CP chip pins 110 (Addr0), 111 (Addr1), and 128
(Addr15).
This is the master clock signal for the Motion Processor. It is driven at a
nominal 40 MHz
This signal provides the clock pulse for the CP chip. Its frequency is half
that of MasterClkIn (pin 89), or 20 MHz nominal. It is connected directly to
the CP chip I/Oclk signal (pin 58).
MC2400 Technical Specifications
31