ES3207 Datasheet, PDF (3/4 Pages) List of Unclassifed Manufacturers – Video CD/DVD Companion Chip

ES3207 VIDEO CD CC PRODUCT BRIEF
PIN DESCRIPTION
Name
TSD
TBCK
RWS
SEL_PLL1
RSTOUT#
NC
RSD
SEL_PLL0
RBCK
SER_IN
VSSA
VREFM
VREFP
VCCA
AOR
AOL
MIC2
MIC1
VREF
VCM
RSET
COMP
CDAC
YDAC
VDAC
XOUT
XIN
PCLK
PCLK2X
HSYNC#
VSYNC#
YUV[7:0]
Number
21
22
23
I/O Definition
I Transmit audio data input.
I Transmit audio bit clock.
O Dual-purpose pin. RWS is the receive audio frame sync.
I Pins SEL_PLL[1:0] select the PLL clock frequency for the DCLK output.
SEL_PLL1
0
0
1
1
SEL_PLL0
0
1
0
1
DCLK
Bypass PLL (input mode)
27 MHz (output mode)
32.4 MHz (output mode)
40.5 MHz (output mode)
24
27:28,65:76
33
37
41,50:51,56:57,62:63
42
43
44:45,59:60
46
47
48
49
52
53
54
55
58
61
64
71
74
79
80
82
84
86:89,92,94,96,98
O Reset output (active-low).
No connect. Do not connect to these pins.
O Dual-purpose pin. RSD is the receive audio data input.
I SEL_PLL0 along with SEL_PLL1 select the PLL clock frequency for the DCLK out-
put. See the table for pin number 23.
O Dual-purpose pin. RBCK is the receive audio bit clock.
I SER_IN is the serial input DSC mode.
0 = Parallel DSC mode.
1 = Serial DSC mode.
I Analog ground.
I DAC and ADC minimum reference. Bypass to VCMR with 10 µF in parallel with 0.1 µF.
I DAC and ADC maximum reference. Bypass to VCMR with 10 µF in parallel with 0.1 µF.
I Analog VCC, 5 V.
O Right channel output.
O Left channel output.
I Microphone input 2.
I Microphone input 1.
I Internal resistor divider generates Common Mode Reference (CMR) voltage.
Bypass to analog ground with 0.1 µF.
I ADC Common Mode Reference (CMR) buffer output. CMR is approximately 2.25 V.
Bypass to analog ground with 47 µF electrolytic in parallel with 0.1 µF.
I Full scale DAC current adjustment.
I Compensation pin.
O Modulated chrominance output.
O Y luminance data bus for screen video port.
O Composite video output.
O Crystal output.
I 27 MHz crystal input.
I/O 13.5 MHz pixel clock.
I/O 27 MHz (2 times pixel clock).
O Horizontal sync (active-low).
O Vertical sync (active-low).
I YUV data bus for screen video port.
ESS Technology, Inc.
SAM0076-051701
3