ES3207 Datasheet, PDF (2/4 Pages) List of Unclassifed Manufacturers – Video CD/DVD Companion Chip

PINOUT
ES3207 VIDEO CD CC PRODUCT BRIEF
PINOUT
DSC_D7
HSYNC#
DSC_D6
VSYNC#
DSC_D5
YUV7
YUV6
YUV5
YUV4
VCC
VSS
YUV3
DSC_D4
YUV2
DSC_D3
YUV1
DSC_D2
YUV0
DSC_D1
VSS
81 ⁸⁰
79 78
77 76 75 74 73 72
71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
50
82
49
83
48
84
47
85
46
86
45
87
44
88
43
89
42
90
91
ES3207
41
40
92
39
93
38
94
37
95
36
96
35
97
34
98
33
99
32
100
31
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
VSSA
MIC1
MIC2
AOL
AOR
VCCA
VCCA
VREFP
VREFM
VSSA
AUX15
AUX14
AUX13
RBCK / SER_IN
AUX12
AUX11
AUX10
RSD / SEL_PLL0
VCC
VSS
PIN DESCRIPTION
Name
VSS
VCC
DSC_C
AUX[15:0]
DSC_D[7:0]
DSC_S
DCLK
EXT_CLK
RST#
MUTE
MCLK
TWS
SPLL_OUT
Number
I/O Definition
1:2,25:26,29:31,72,75, I Ground.
77,91,100
3:5,16,32,66,73,78,90 I Voltage supply, 5 V.
6
I Clock for programming to access internal registers.
40:38,36:34,20,18,14, I/O Auxiliary control pins.
67:70,11,9,7
81,83,85,93,95,97,99,8 I/O Data for programming to access internal registers.
10
I Strobe for programming to access internal registers.
O Dual-purpose pin. DCLK is the MPEG decoder clock.
12
I EXT_CLK is the external clock. EXT_CLK is an input during bypass PLL mode.
13
I Video reset (active-low).
15
O Audio mute.
17
I Audio master clock.
I Dual-purpose pin. TWS is the transmit audio frame sync.
19
O SPLL_OUT is the select PLL output.
2
SAM0076-051701
ESS Technology, Inc.