PE12316 Datasheet, PDF (28/29 Pages) List of Unclassifed Manufacturers – Triple Incremental Encoder

February 6, 2003 Preliminary (Version 1.1)
PE12316
Triple
Incremental Encoder
Figures
Figure 1 Pinout............................................................................................................................ 1
Figure 2 Block Diagramm for 16 Bit Mode................................................................................... 4
Figure 3 Direction Discriminator Modes...................................................................................... 7
Figure 4 Direction Discriminator Up Clock.................................................................................. 7
Figure 5 Direction Discriminator Down Clock ............................................................................. 8
Figure 6 Pulse Width Measurement............................................................................................. 9
Figure 7 Frequency Measurement............................................................................................. 10
Figure 10 Timing – Mode 6-7 ..................................................................................................... 19
Figure 11 Read Cycle ................................................................................................................ 20
Figure 12 Write Cycle ................................................................................................................ 21
Figure 13 Three Axis Control System using PE12316 ............................................................... 22
Figure 14 Two Cascaded Channels (One 32-bit channel shown) .............................................. 23
Figure 15 PLCC68 Package Dimension ..................................................................................... 25
Tables
Table 1 Mode Description............................................................................................................ 5
Table 2 Channel Selection........................................................................................................... 6
Table 3 Memory Map ................................................................................................................... 6
Table 4 Mode Selection ............................................................................................................. 11
Table 5 Cascading bitwidths ..................................................................................................... 27
February 6, 2003 (Preliminary Version 1.1)
Page 28/29
PE12316