SI5600 Datasheet, PDF (23/28 Pages) List of Unclassifed Manufacturers – SiPHY-TM OC-192/STM-64 SONET/SDH TRANSCEIVER

Si5600
Pin Number(s)
J13–14, K13–
14, L13–14,
M13–14, N3–
14, P3–14
Name
TXDIN[15:0]+,
TXDIN[15:0]–
K1, L1
TXDOUT+,
TXDOUT–
M5
TXLOL
M9
TXMSBSEL
L3
TXREXT
M12
TXSQLCH
E5–10, F5–10,
G5–10, H5–10,
J5–10, K5–10
VDD
I/O
I
O
O
I
I
VDD
Signal Level
Description
LVDS
Differential Parallel Data Input.
The 16-bit data word present on these pins is
multiplexed into a high speed serial stream and
output on TXDOUT. The data on these inputs is
clocked into the device by the rising edge of
TXCLK16IN.
CML
Differential High Speed Data Output.
The 16-bit word input on TXDIN[15:0] is multi-
plexed into a high speed serial stream that is out-
put on these pins. Input data is multiplexed in
sequence from TXDIN0 to TXDIN15 with TXDIN0
transmitted first. This output is updated by the ris-
ing edge of TXCLKOUT.
LVTTL
CMU Loss-of-Lock.
The output is asserted low when the CMU is not
phase locked to the selected reference source.
LVTTL
Data Bus Transmit Order.
For TXMSBSEL = 0, data on TXDIN[0] is trans-
mitted first followed by TXDIN[1] through
TXDIN[15].
For TXMSBSEL = 1, TXDIN[15] is transmitted
first followed by TXDIN[14] through TXDIN[0].
External Bias Resistor.
This resistor is used by the transmitter circuitry to
establish bias currents within the device. This pin
must be connected to GND through a 3.09 kΩ
(1%) resistor.
LVTTL
Transmit Data Squelch.
If TXSQLCH is asserted low, the output data
stream on TXDOUT will be forced to 0s. If
TXSQLCH = 1, TX squelching is turned off.
1.8 V
Supply Voltage.
Nominally 1.8 V.
Preliminary Rev. 0.31
23