83C694 Datasheet, PDF (23/33 Pages) List of Unclassifed Manufacturers – TWISTED PAIR INTERFACE AND MACHESTER ENCODER/DECODER

83C694D
AC OPERATING CHARACTERISTICS
5.1 TIMING DIAGRAMS
Figures 5–1 through 5–9 illustrate all timings. Table 5–2 lists all timing diagrams.
Figure Number
5–1
5–2
5–3
5–4
5–5
5–6
5–7
5–8
5–9
5–10
5–11
5–12
Title
Transmit Timing – Start of Transmission
Transmit Timing – End of Transmission (last bit = 0)
Transmit Timing – End of Transmission (last bit = 1)
Transmit Timing – Link Test Pulse
Receive Timing – Start of Packet
Receive Timing – End of Packet (last bit = 0)
Receive Timing – End of Packet (last bit = 1)
Collision Timing (AUI)
Collision Timing (TP)
SQE Test Timing
Loopback Timing
Test Loads
TABLE 5–2. 83C694D TIMING DIAGRAMS
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