GS832218 Datasheet, PDF(15/41 Page) List of Unclassifed Manufacturers – 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

GS832218 Datasheet, PDF (15/41 Pages) List of Unclassifed Manufacturers – 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs

◁

Preliminary

GS832218(B/E)/GS832236(B/E)/GS832272(C)

Simplified State Diagram

Deselect

First Write R

First Read

X Burst Write

Burst Read

Notes:

1. The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.

2. The upper portion of the diagram assumes active use of only the Enable (E1) and Write (BA, BB, BC, BD, BW, and GW) control inputs, and

that ADSP is tied high and ADSC is tied low.

3. The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs and

assumes ADSP is tied high and ADV is tied low.

Rev: 1.06 9/2004

15/41

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

▷