ARM720T Datasheet, PDF(141/242 Page) List of Unclassifed Manufacturers – General-purpose 32-bit Microprocessor with 8KB cache, enlarged Write buffer, and Memory Management Unit (MMU) combined in a single chip

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ARM720T Datasheet, PDF (141/242 Pages) List of Unclassifed Manufacturers – General-purpose 32-bit Microprocessor with 8KB cache, enlarged Write buffer, and Memory Management Unit (MMU) combined in a single chip

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Debug Interface

Once in debug state, a minimum of two instructions must be executed before the branch,

although these can both be NOPs, for example:

MOV R0, R0

For small branches, the final branch can be replaced by a subtract with the PC as the

destination:

SUB PC, PC, #28

7.10.2 Watchpoint

Returning to program execution after entering debug state from a watchpoint is done in

the same way as the procedure described above. Debug entry adds four addresses to the

PC, and every instruction adds one address. The difference is that because the

instruction that caused the watchpoint has executed, the program returns to the next

instruction.

7.10.3 Watchpoint with another exception

If a watchpointed access simultaneously causes a Data Abort, ARM7TDM enters debug

state in abort mode. Entry into debug is held off until the core has changed into abort

mode, and fetched the instruction from the abort vector.

A similar sequence is followed when an interrupt, or any other exception, occurs during

a watchpointed memory access. ARM7TDM enters debug state in the exception mode,

and so the debugger must check to see whether this happened. The debugger can deduce

whether an exception occurred by looking at the current and previous mode, in the

CPSR and SPSR, and the value of the PC. If an exception does take place, you must

give the user the choice of whether to service the exception before debugging.

Exiting from debug state

Exiting debug state if an exception occurred is slightly different from the other cases.

Here, entry to debug state causes the PC to be incremented by three addresses rather

than four, and this must be taken into account in the return branch calculation. For

example, suppose that an abort occurred on a watchpointed access and ten instructions

had been executed to determine this. The following sequence can be used to return to

program execution:

0 E1A00000; MOV R0, R0

1 E1A00000; MOV R0, R0

0 EAFFFFF0; B -16

ARM DDI 0192A

7-31

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