ARM720T Datasheet, PDF (107/242 Pages) List of Unclassifed Manufacturers – General-purpose 32-bit Microprocessor with 8KB cache, enlarged Write buffer, and Memory Management Unit (MMU) combined in a single chip

Memory Management Unit
6.15 External aborts
In addition to the MMU-generated aborts, ARM720T has an external abort pin,
BERROR, which can be used to flag an error on an external memory access. However,
not all accesses can be aborted in this way, so use this pin with great care. This section
describes the restrictions.
The following accesses can be aborted and restarted safely. The external access stops
on the next cycle if any of the following are aborted:
• reads
• unbuffered writes
• level 1 descriptor fetch
• level 2 descriptor fetch
• read-lock-write sequence.
In the case of a read-lock-write sequence in which the read aborts, the write does not
happen.
6.15.1 Cachable reads (linefetches)
A linefetch can be safely aborted on any word in the transfer.
If an abort occurs during the linefetch, the cache is purged, so it does not contain invalid
data.
If the abort happens on a word that has been requested by the ARM720T, it is aborted,
otherwise the cache line is purged but program flow is not interrupted. The line is
therefore purged under all circumstances.
6.15.2 Buffered writes
Buffered writes cannot be externally aborted. Therefore, the system must be configured
so that it does not attempt buffered writes to areas of memory that are capable of
flagging an external abort.
Note
Areas of memory that can generate an external abort on a location that has previously
been read successfully must not be marked as cachable or unbufferable. This applies to
both the MMU page tables and the configuration register. If all writes to an area of
memory abort, it is recommended that you mark it as read-only in the MMU, otherwise
mark it as uncachable and unbufferable.
ARM DDI 0192A
Copyright © ARM Limited 1997, 1998, 2000. All rights reserved.
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