MTL003 Datasheet, PDF (12/64 Pages) List of Unclassifed Manufacturers – SXGA Flat Panel Controller

MYSON
TECHNOLOGY
MTL003
(Rev. 0.95)
3.3.2 OSD Overlay
MTL003 allows the integration of overlay data with the scaled output pixel stream. It provides a fully
compatible OSD interface. Individual OSD clock, OSD HSYNC and OSD VSYNC are sent to external OSD
device. MTL003 receives OSD Enable, OSD Red, OSD Green, OSD Blue, and OSD Intensity from external
OSD device.
3.3.3 RGB Output Format
MTL003 output interface consists of two pixel ports, each containing Red, Green, and Blue color information
with a resolution of 6/8 bits per color. These two ports are PORT1 and PORT2 respectively.
The control signals for output port are the display horizontal sync signal (DHSYNC), the display vertical sync
signal (DVSYNC) and the display data enable signal (DDEN).
All the signals mentioned above are synchronous to the output clock. The output timing relative to the active
edge of the output clock is programmable.
There are two RGB output formats:
¨ Single Pixel Mode
Is designed to support TFT panels with single pixel input. Only PORT1 is active. The frequency of DCLK1 is
equal to the internal display clock.
¨ Dual Pixel Mode
Is designed to support TFT panels with dual pixel input. PORT1 and PORT2 are used. The first pixel is at
PORT1, and the second at PORT2.
DCLK
DDEN
R1OUT/G1OUT
/B1OUT
000
DCLK
DCLK1
DCLK2
DDEN
R1OUT/G1OUT
/B1OUT
000
R2OUT/G2OUT
/B2OUT
000
rgb0 rgb1 rgb2 rgb3 rgb4
rgb0 rgb2 rgb4 rgb6 rgb8
rgb1 rgb3 rgb5 rgb7 rgb9
Revision 0.95
Fig. 3.2.4 Display Data Timing
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2000/06/14