CS18LV10245 Datasheet, PDF (12/15 Pages) List of Unclassifed Manufacturers – HIgh Speed Super Low Power SRAM

High Speed Super Low Power SRAM
128K-Word By 8 Bit
CS18LV10245
6. /OE is continuously low (/OE = V_IL ).
7. D_OUT is the same phase of write data of this write cycle.
8. D_OUT is the read data of next address.
9. If /CE is low during this period, DQ pins are in the output state. Then the data input
signals of opposite phase to the outputs must not be applied to them.
10. Transition is measured ±500mV from steady state with C_L = 5pF as shown in Figure 1B.
The parameter is guaranteed but not 100% tested.
11. T_CW is measured from the later of /CE going low to the end of write.
Copyright 2004 March Chiplus Semiconductor Corp. All rights reserved. .
Rev. 1.2
P 12