HAL320 Datasheet, PDF (11/13 Pages) List of Unclassifed Manufacturers – Differential Hall Effect Sensor IC

HAL320
Application Notes
Mechanical stress can change the sensitivity of the Hall
plates and an offset of the magnetic switching points
may result. External mechanical stress on the sensor
must be avoided if the sensor is used under back-biased
conditions. This piezo sensitivity of the sensor IC cannot
be completely compensated for by the switching offset
compensation technique.
In order to assure switching the sensor on and off in a
back-biased application, the minimum magnetic modu-
lation of the differential field should amount to more than
10% of the magnetic preinduction.
If the HAL 320 sensor IC is used in back-biased applica-
tions, please contact our Application Department. They
will provide assistance in avoiding applications which
may induce stress to the ICs. This stress may cause
drifts of the magnetic parameters indicated in this data
sheet.
For electromagnetic immunity, it is recommended to ap-
ply a 4.7 nF capacitor between V_DD (pin 1) and Ground
(pin 2). For automotive applications, a 220 W series re-
sistor to pin 1 is recommended. Because of the I_DD peak
at 3.5 V, the series resistor should not be greater than
270 Ω. The series resistor and the capacitor should be
placed as close as possible to the IC. For optimal EMC
behavior, the test circuits in Fig. 21 and Fig. 22 are rec-
ommended.
Ambient Temperature
Due to the internal power dissipation, the temperature
on the silicon chip (junction temperature T_J) is higher
than the temperature outside the package (ambient tem-
perature T_A).
T_J = T_A + ∆T
At static conditions, the following equations are valid:
– for SOT-89x: ∆T = I_DD * V_DD * R_thJSB
– for TO-92UA: ∆T = I_DD * V_DD * R_thJA
For typical values, use the typical parameters. For worst
case calculation, use the max. parameters for I_DD and
R_th, and the max. value for V_DD from the application.
Recommended Test Circuits
for Electromagnetic Compatibility
Test pulses V_EMC corresponding to DIN 40839.
R_V
220 Ω
V_EMC
V_P
1 V_DD
4.7 nF
2 GND
R_L 1.2 kΩ
OUT
3
20 pF
Fig. 21: Test circuit 2: test procedure for class A
R_V
220 Ω
V_EMC
1 V_DD
4.7 nF
2 GND
R_L
OUT
3
680 Ω
Fig. 22: Test circuit 1: test procedure for class C
Micronas
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