|
FX489 Datasheet, PDF (11/12 Pages) List of Unclassifed Manufacturers – GMSK Modem | |||
|
◁ |
Specification
Absolute Maximum Ratings
Exceeding the maximum rating can result in device damage. Operation of the device outside the operating limits is
not implied.
Supply voltage
-0.3 to 7.0V
Input voltage at any pin (ref VSS = 0V)
Sink/source current (supply pins)
-0.3 to (VDD + 0.3V)
+/- 30mA
(other pins)
+/- 20mA
Total device dissipation @ TAMB 25°C
Derating
800mW Max.
10mW/°C
Operating temperature range: FX489DW/P
-40°C to +85°C
Storage temperature range: FX489DW/P
-40°C to +85°C
Operating Limits
All device characteristics are measured under the following conditions unless otherwise specified:
VDD = 5.0V, TAMB = 25°C. Xtal/Clock Frequency = 4.096MHz. Data Rate = 8000 bits/sec.
Noise Bandwidth = Bit Rate
Characteristics
See Note
Min.
Typ.
Max.
Unit
Static Values
Supply Voltage (V )
DD
Supply Current Tx PS Rx PS
1
1
1
0
1
1
0
0
0
Input Logic Levels
Logic â1â
Logic â0â
Logic Input Current
2
Logic â1âOutput Level at IOH = -120µA
Logic â0âOutput Level at IOL = 120µA
Rx, Tx Data Rate
Transmit Parameters
Tx OUT, Output Impedance
3
Tx OUT, Level
4
Tx Data Delay (BT = 0.3)
5
(BT = 0.5)
5
Tx PS to Output-Stable Time
6
Receive Parameters
Rx Amplifier -
Input Impedance
Output Impedance
7
Voltage Gain
Rx Filter Signal Input Level
8
Rx Time Delay
9
On-Chip Xtal Oscillator
R IN
R OUT
Voltage Gain
Xtal/Clock Frequency
âHighâ Pulse Width
10
âLowâ Pulse Width
10
4.5
-
-
-
-
3.5
-
-5.0
4.6
-
4000
-
0.8
-
-
-
1.0
-
-
0.7
-
10.0
5.0
-
1.0
80.0
80.0
5.0
5.5
V
1.0
-
mA
3.0
-
mA
4.0
-
mA
7.0
-
mA
-
-
V
-
1.5
V
-
5.0
µA
-
-
V
-
0.4
V
19200 bits/sec
1.0
-
kâ¦
1.0
1.2
V p-p
2.0
2.5
bit-periods
1.5
2.0
bit-periods
4.0
-
bit-periods
-
-
Mâ¦
10.0
-
kâ¦
50.0
-
dB
1.0
1.3
V p-p
-
3.0
bit-periods
-
-
Mâ¦
-
15.0
kâ¦
15.0
-
dB
â
5.0
MHz
-
-
ns
-
-
ns
Notes
1. Not including current drawn from the FX489 pins by external circuitry. See Absolute Maximum Ratings.
2. For VIN in the range VSS to VDD.
3 For a load of 10k⦠or greater. Tx PS input at logic â0â; Tx Enable = â1â.
4. Data pattern of â1111000011110000 ..â
5. Measured between the rising edge of âTx Clockâ and the centre of the corresponding bit at âTx Out.â
6. Time between the falling edge of âTx PSâ and the âTx Outâ voltage stabilising to normal output levels.
7. For a load of 10k⦠or greater. Rx PS input at logic â0â.
8. For optimum performance, measured at the âRx Feedbackâ pin for a â1111000011110000 ...â pattern.
9. Measured between the centre of bit at âRx Signal Inâ and corresponding rising edge of the âRx Clockâ.
10. Timing for an external clock input to the Xtal/Clock pin.
11
|
▷ |