CS3810 Datasheet, PDF (11/12 Pages) List of Unclassifed Manufacturers – 32 QAM Demodulator

Typical ASIC or FPGA Design Flow
(Conceptual)
System-Level "C" Code simulation
Hardware RTL Development
RTL Simulation
Logic Synthesis
Gate-level analysis
(timing & functional)
Physical Design
Figure 8: Design Data Formats Supplied by Amphion
TM
Data Formats
Supplied by AMPHION
Bit Accurate
C Model
RTL Simulation
Models
Testbench
(VHDL & Verilog)
Netlists
(Verilog, VHDL, EDIF, .bd)
FPGA Programming
Files
11