CS3810 Datasheet, PDF (10/12 Pages) List of Unclassifed Manufacturers – 32 QAM Demodulator

CS3810 32 QAM Demodulator
PERFORMANCE AND DENSITY METRICS
PROGRAMMABLE LOGIC CORES - DENSITY METRICS
For ASIC prototyping or for projects requiring fast time-to-market of a programmable logic solution, Amphion programmable
logic cores offer the silicon-aware performance tuning found in all Amphion products, combined with the rapid design times
offered by today's leading programmable logic solutions.
The following performance and density metrics has been obtained when the demodulator core is implemented as a stand-alone
design in the device specified below. It should be noted that if the function is implemented on different FPGA devices, or
combined with additional logic in larger devices, then additional constraints might need to be applied to achieve the similar
metrics.
Note that the metrics are provided for demodulation (Table 3) and channel decoding (Table 4) separately.
DEVICE
APEX20KC-7
Table 3: CS3810 FEC Decoder Programmable Logic Core - Altera
SILICON
VENDOR
Altera
AREA
MEMORY REQUIREMENT
10044 LEs
34 ESBs
CRITICAL PATH
(TXUSRXLK)
56.82 MHz
(17.6 ns)
CRITICAL PATH
(CLK74M)
75.76 MHz
(13.2 ns)
Table 4: CS3810 Symbol & Timing Recovery Programmable Logic Core - Altera
DEVICE
APEX20KC-7
SILICON
VENDOR
Altera
AREA
11276 LEs
MEMORY REQUIREMENT
24 ESBs
CRITICAL PATH
(CLK74M)
74.63 MHz
(13.4 ns)
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