UTI760A Datasheet, PDF (1/48 Pages) List of Unclassifed Manufacturers – UTI760A RTS Remote Terminal for Stores

UTI760A RTS Remote Terminal for Stores
FEATURES
Ë Complete MIL-STD-1760A Notice I through III
remote terminal interface
Ë 1K x 16 of on-chip static RAM for message data,
completely accessible to host
Ë Self-test capability, including continuous loop-back
compare
Ë Programmable memory mapping via pointers for
efficient use of internal memory, including buffering
multiple messages per subaddress
Ë RT-RT Terminal Address Compare
Ë Command word stored with incoming data for
enhanced data management
Ë User selectable RAM Busy (RBUSY) signal for slow
or fast processor interfacing
Ë Full military operating temperature range, -55°C to
+125°C, screened to the specific test methods listed in
Table I of MIL-STD-883, Method 5004, Class B, also
Standard Military Drawing available
Ë Available in 68-pin pingrid array package
INTRODUCTION
The UT1760A RTS is a monolithic CMOS VLSI solution
to the requirements of the dual-redundant MIL-STD-1553B
interface as specified by MIL-STD-1760A. Designed to
reduce cost and space in the mission stores interface, the
RTS integrates the remote terminal logic with a user-
configured 1K x 16 static RAM. In addition, the RTS has a
flexible subsystem interface to permit use with most
processors or controllers.
The RTS provides all protocol, data handling, error
checking, and memory control functions, as well as
comprehensive self-test capabilities. The RTS’s memory
meets all of a mission store’s message storage needs through
user-defined memory mapping. This memory-mapped
architecture allows multiple message buffering at
OUT
IN
OUT
IN
DECODER
MCSA(4:0)
MODE CODE/
SUBADDRESS
RTA(4:0)
CONTROL
REMOTE TERMINAL INPUTS
ADDRESS
COMMAND
RECOGNITION
CONTROL AND
ERROR LOGIC
STATUS
OUTPUTS
DECODER
ENCODER
MUX
1K X 16 RAM
ADDR(9:0)
PTR REGISTER
DATA(15:0)
CLOCK AND RESET ^12MHz
LOGIC
RESET
2MHz
Figure 1. UT1760A RTS Functional Block Diagram
RTS-1