TMC93LC46 Datasheet, PDF (1/15 Pages) List of Unclassifed Manufacturers – 1K/2K/2K/4K/16K-Bit Microwire Serial EEPROM

TMC 93LC46/56/57/66/86
1K/2K/2K/4K/16K-Bit Microwire Serial EEPROM
FEATURES
s High speed operation:
– 93LC46/56/57/66 : 1MHz
– 93LC86 : 3MHz
s Low power CMOS technology
s 1.8 to 6.0 volt operation
s Selectable x8 or x16 memory organization
s Self-timed write cycle with auto-clear
s Hardware and software write protection
s Power-up inadvertant write protection
s 1,000,000 Program/erase cycles
s 100 year data retention
s Commercial, industrial and automotive
temperature ranges
s Sequential read (except TMC93LC46)
s Program enable (PE) pin (TMC93LC86 only)
DESCRIPTION
The 93LC46/56/57/66/86 are 1K/2K/2K/4K/16K-bit
Serial EEPROM memory devices which are configured
as either registers of 16 bits (ORG pin at VCC) or 8 bits
(ORG pin at GND). Each register can be written (or read)
serially by using the DI (or DO) pin. The 93LC46/56/
57/66/86 are manufactured using TMC’s advanced
CMOS EEPROM floating gate technology. The devices
are designed to endure 1,000,000 program/erase cycles
and have a data retention of 100 years. The devices are
available in 8-pin DIP, 8-pin SOIC or 8-pin TSSOP
packages.
PIN CONFIGURATION
DIP Package (P, L) SOIC Package (J,W) SOIC Package (S,V) SOIC Package (K,X)
CS ¹
SK ²
DI ³
DO ⁴
8 _VCC
NC (PE*) ¹
7 _{NC (PE*)}
VCC 2
6 _ORG
CS 3
5 _GND
SK 4
8 ORG CS 1
7 GND SK 2
6 DO
DI 3
5 DI
DO 4
8 VCC
CS 1
7 _{NC (PE*)} SK 2
6 ORG
DI 3
5 GND
DO 4
8 VCC
7 _{NC (PE*)}
6 ORG
5 GND
TSSOP Package (U,Y)**
CS ¹
SK 2
DI
3
DO ⁴
8
VCC
7 _{NC (PE*)}
6 _ORG
5 _GND
PIN FUNCTIONS
Pin Name
Function
CS
Chip Select
SK
Clock Input
DI
Serial Data Input
DO
Serial Data Output
VCC
GND
+1.8 to 6.0V Power Supply
Ground
ORG
Memory Organization
NC
No Connection
PE*
Program Enable
Note: When the ORG pin is connected to VCC, the x16 organiza-
tion is selected. When it is connected to ground, the x8 pin
is selected. If the ORG pin is left unconnected, then an
internal pullup device will select the x16 organization.
BLOCK DIAGRAM
VCC
GND
ORG
MEMORY ARRAY
ORGANIZATION
DATA
REGISTER
DI
MODE DECODE
CS
LOGIC
PE*
CLOCK
SK
GENERATOR
ADDRESS
DECODER
OUTPUT
BUFFER
DO
93LC46/56/57/66/86 F02
© 2002 by TMC
Doc. No. 1023, Rev. G