CH5001A Datasheet, PDF (1/34 Pages) List of Unclassifed Manufacturers – CMOS COLOR DIGITAL VIDEO CAMERA

CHRONTEL
CH5001A
CMOS Color Digital Video Camera
Features
Description
• 352 x 288 active pixel array with color filters, 1/3 inch The CH5001 is a single chip active pixel CMOS color
lens format ¥
video camera with digital video output in several formats.
• Programmable formats CIF 352x288, QCIF 176x144,
CCIR601 704x288
• Digital output CCIR601 4:2:2 (8-bit or 16-bit)
• Multidimensional automatic shutter control
Using sophisticated noise correction circuitry to minimize
fixed pattern noise and dark current effects, the CH5001
provides a supurb quality picture in a low cost device.
The CH5001 uses a proprietary autoshutter algorithm to
dynamically control the shutter time, analog gain, and
• Below 5 LUX sensitivity
• Programmable I²C Serial bus control:
- Frame rate: 30fps-1fps in eight steps
- Gamma correction
- Shutter speed
- Analog gain
- 16 backlight compensation zones
- Black clamp level
black clamp level, providing optimum picture and contrast
under all lighting conditions. The CH5001 also
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incorporates extensive on-chip programmable digital
signal processing to maximize the usefulness of the device
in processor driven applications. This includes 16
programmable zones for backlight compensation,
allowing the user to adjust the image to their unique
lighting environment.
- White balance adjustment
Additionally, at power-up the backlight compensation
- Power down modes
zone, power-up condition, and direct A/D output modes
• Stand-alone 25fps PAL operation with all automatic
are selectable without IIC control by using the PUD pins.
features
Requiring a minimum of parts for operation, the CH5001
• Single crystal operation: Video timing on-chip
provides a low cost camera for the next generation video
• Single 5V power supply
conferencing, videophone, and surveillance products.
• Less than 0.5 watt power dissipation
Â¥ Patent number x,xxx,xxx patents pending
Photocell
352
Columns
Array
B
G
G
R
288
Rows
Row Decode
R
O
Shutter
W
Control
T
I
M
I
N
G
Color
Control
Gain
A/D
Black
Clamp
Matrix Gamma
Multiply Correct
RGB
to
YCrCB
Filter
Figure 1: Block Diagram
I ²C
BUS
Timing
&
Mode
Control
Output
Format
SD
SC
AS
HREF
PDP*
HS*
VS*
CLKOUT
Reset*
XI/Fin
XO
MONO
TOUT/TOUTB
OVR
Y[7:0]
C[7:0] PUD[6:0]
CRS
201-0000-032 Rev 3.0, 6/2/99
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