AS29LV400 Datasheet, PDF (1/26 Pages) Alliance Semiconductor Corporation – 3V 512K x 8/256K × 16 CMOS Flash EEPROM

Preliminary Information
March 2001
AS29LV400
®
3V 512K x 8/256K × 16 CMOS Flash EEPROM
Features
• Organization: 512Kx8/256Kx16
• Sector architecture
- One 16K; two 8K; one 32K; and seven 64K byte sectors
- One 8K; two 4K; one 16K; and seven 32K word sectors
- Boot code sector architecture—T (top) or B (bottom)
- Erase any combination of sectors or full chip
• Single 2.7-3.6V power supply for read/write operations
• Sector protection
• High speed 70/80/90/120 ns address access time
• Automated on-chip programming algorithm
- Automatically programs/verifies data at specified address
• Automated on-chip erase algorithm
- Automatically preprograms/erases chip or specified
sectors
• Hardware RES ET pin
- Resets internal state machine to read mode
• Low power consumption
- 200 nA typical automatic sleep mode current
- 200 nA typical standby current
- 10 mA typical read current
• JEDEC standard software, packages and pinouts
- 48-pin TSOP
- 44-pin SO; availabillity TBD
• Detection of program/erase cycle completion
- DQ7 DATA polling
- DQ6 toggle bit
- DQ2 toggle bit
- RY/B Y output
• Erase suspend/resume
- Supports reading data from or programming data to a
sector not being erased
• Low V_CC write lock-out below 1.5V
• 10 year data retention at 150C
• 100,000 write/erase cycle endurance
Logic block diagram
V_CC
V_SS
RESET
RY/B Y
Sector protect/
erase voltage
switches
Erase voltage
generator
DQ0–DQ15
Input/output
buffers
WE
BYTE
Program/erase
control
Command
register
CE
OE
A-1
Program voltage
generator
Chip enable
Output enable
Logic
STB _{Data latch}
STB
Y decoder
Y gating
V_CC detector
Timer
A0–A17
X decoder
Cell matrix
Pin arrangement
48-pin TSOP
AS29LV40
44-pin SO
RY/BY
1
NC
2
A17
3
A7
4
A6
5
A5
6
A4
7
A3
8
A2
9
A1
10
A0
11
CE
12
V_SS
13
OE
14
DQ0
15
DQ8
16
DQ1
17
DQ9
18
DQ2
19
DQ10
20
DQ3
21
DQ11
22
44
RESET
43
WE
42
A8
41
A9
40
A10
39
A11
38
A12
37
A13
36
A14
35
A15
34
A16
33
BYTE
32
V_SS
31
DQ15/A-1
30
DQ7
29
DQ14
28
DQ6
27
DQ13
26
DQ5
25
DQ12
24
DQ4
23
V_CC
Selection guide
29LV400-70 29LV400-80 29LV400-90 29LV400-120 Unit
Maximum access time
t_AA
70
80
90
120
ns
Maximum chip enable access time
t_CE
70
80
90
120
ns
Maximum output enable access time
t_OE
30
30
35
50
ns
3/20/01; V.0.9.3
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