M52S16161A-2J Datasheet, PDF (4/31 Pages) Elite Semiconductor Memory Technology Inc. – LVCMOS compatible with multiplexed address

ESMT
M52S16161A (2J)
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 °C ~ 70 °C )
Parameter
Symbol
Test Condition
Version
-6
-7.5
-10
Operating Current
(One Bank Active)
ICC1
Burst Length = 1
tRC ≥ tRC (min), tCC ≥ tCC (min), IOL= 0mA
50
45
40
Precharge Standby
Current in power-down
mode
ICC2P
ICC2PS
CKE ≤ VIL(max), tCC =15ns
CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞
0.18
0.15
Precharge Standby
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC =15ns
6
Current in non
Input signals are changed one time during 30ns
power-down mode
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
4
Active Standby Current ^ICC3P
CKE ≤ VIL(max), tCC =15ns
2
in power-down mode
ICC3PS CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞
2
CKE ≥ VIH(min), CS ≥ VIH(min), tCC=15ns
Active Standby Current _ICC3N
Input signals are changed one time during 2clks
12
in non power-down
mode
All other pins ≥ V_DD-0.2V or ≤ 0.2V
(One Bank Active)
ICC3NS
CKE ≥ VIH (min), CLK ≤ VIL(max), tCC= ∞
Input signals are stable
6
Operating Current
(Burst Mode)
IOL= 0mA, Page Burst
ICC4
All Band Activated, t_CCD = t_CCD (min)
70
65
60
Refresh Current
ICC5
tRFC ≥ tRFC(min)
55
50
45
TCSR range
15
85
Self Refresh Current
CKE ≤ 0.2V
ICC6
2 Banks
180
200
1 Bank
160
180
Deep Power Down
Current
ICC7
CKE ≤ 0.2V
1/2 Bank
150
160
10
Note: 1.Measured with outputs open. Addresses are changed only one time during tCC(min).
2.Refresh period is 32ms. Addresses are changed only one time during tCC(min).
Unit Note
mA 1
mA
mA
mA
mA
mA
mA
mA
mA 1
mA 2
°C
uA
uA
Elite Semiconductor Memory Technology Inc.
Publication Date : Aug. 2010
Revision : 1.4
4/31