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M52S16161A-2J Datasheet, PDF (1/31 Pages) Elite Semiconductor Memory Technology Inc. – LVCMOS compatible with multiplexed address
ESMT
M52S16161A (2J)
Mobile SDRAM
512K x 16Bit x 2Banks
Mobile Synchronous DRAM
FEATURES
z 2.5V power supply
z LVCMOS compatible with multiplexed address
z Dual banks operation
z MRS cycle with address key programs
- CAS Latency (2 & 3 )
- Burst Length (1, 2, 4, 8 & full page)
- Burst Type (Sequential & Interleave)
z EMRS cycle with address key programs.
z All inputs are sampled at the positive going edge of the
system clock
z Burst Read Single-bit Write operation
z Special Function Support.
- PASR (Partial Array Self Refresh )
- TCSR (Temperature compensated Self Refresh)
- DS (Driver Strength)
z DQM for masking
z Auto & self refresh
z 32ms refresh period (2K cycle)
GENERAL DESCRIPTION
The M52S16161A is 16,777,216 bits synchronous high data
rate Dynamic RAM organized as 2 x 524,288 words by 16 bits,
fabricated with high performance CMOS technology.
Synchronous design allows precise cycle control with the use of
system clock I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst length and
programmable latencies allow the same device to be useful for a
variety of high bandwidth, high performance memory system
applications.
ORDERING INFORMATION
Product ID
Max Freq.
Package
Comments
M52S16161A-6TG2J 166MHz 50 Pin TSOP(II) Pb-free
M52S16161A-7.5TG2J 133MHz 50 Pin TSOP(II) Pb-free
M52S16161A-10TG2J 100MHz 50 Pin TSOP(II) Pb-free
PIN CONFIGURATION (TOP VIEW)
(TSOPII 50L, 400milX825mil Body, 0.8mm Pin Pitch )
VDD
1
DQ0
2
DQ1
3
VSSQ
4
DQ2
5
DQ3
6
VDDQ
7
DQ4
8
DQ5
9
VSSQ
10
DQ6
11
DQ7
12
VDDQ
13
LDQM 14
WE
15
CAS
16
RAS
17
CS
18
BA
19
A10/AP 20
A0
21
A1
22
A2
23
A3
24
VDD
25
50 VSS
49 DQ15
48 DQ14
47 VSSQ
46 DQ13
45 DQ12
44 VDDQ
43 DQ11
42 DQ10
41 VSSQ
40 DQ9
39 DQ8
38 VDDQ
37 N.C/RFU
36 UDQM
35 CLK
34 CKE
33 N.C
32 A9
31 A8
30 A7
29 A6
28 A5
27 A4
26 VSS
50PIN TSOP(II)
(400mil x 825mil)
(0.8 mm PIN PITCH)
Elite Semiconductor Memory Technology Inc.
Publication Date : Aug. 2010
Revision : 1.4
1/31