M12L64164A-2Y Datasheet, PDF (17/45 Pages) Elite Semiconductor Memory Technology Inc. – JEDEC standard 3.3V power supply

ESMT
3. CAS Interrupt (I)
M12L64164A (2Y)
*Note 1
1) Re ad i nte rr upt ed b y R ea d ( BL= 4)
CLK
CMD
RD RD
ADD
A
B
DQ( CL2)
DQ (CL3)
QA0 QB0 QB1 QB2 QB3
tC C D
*Note 2
QA0 QB0 QB1 QB2 QB3
2) W ri te i nte rr up ted by W r it e ( BL= 2)
CL K
CMD
ADD
WR WR
tC CD *N ote 2
A
B
DQ
DA 0 DB0 DB 1
t CD L
*Note 3
3) Wr it e i nte rr upte d b y R ea d ( BL= 2)
DQ( CL2)
DQ (CL3)
WR RD
t CC D *No te 2
A
B
DA0
DA0
t CD L
*Note 3
DB 0 DB1
DB0 DB1
*Note:
1. By “interrupt” is meant to stop burst read/write by external before the end of burst.
By ” CAS interrupt ”, to stop burst read/write by CAS access; read and write.
2. tCCD: CAS to CAS delay. (=1CLK)
3. tCDL: Last data in to new column address delay. (=1CLK)
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2012
Revision: 1.1
17/45