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M52D128324A-2E Datasheet, PDF (1/31 Pages) Elite Semiconductor Memory Technology Inc. – LVCMOS compatible with multiplexed address
ESMT
Mobile SDRAM
M52D128324A (2E)
1M x 32Bit x 4Banks
Mobile Synchronous DRAM
FEATURES
z 1.8V power supply
z LVCMOS compatible with multiplexed address
z Four banks operation
z MRS cycle with address key programs
- CAS Latency (2 & 3 )
- Burst Length (1, 2, 4, 8 & full page)
- Burst Type (Sequential & Interleave)
z EMRS cycle with address key programs.
z All inputs are sampled at the positive going edge of the
system clock
z Burst Read Single-bit Write operation
z Special Function Support
- PASR (Partial Array Self Refresh )
- TCSR (Temperature Compensated Self Refresh)
- DS (Driver Strength)
z DQM for masking
z Auto & self refresh
z 64ms refresh period (4K cycle)
GENERAL DESCRIPTION
The M52D128324A is 134,217,728 bits synchronous high
data rate Dynamic RAM organized as 4 x 1,048,576 words
by 32 bits, fabricated with high performance CMOS
technology. Synchronous design allows precise cycle
control with the use of system clock I/O transactions are
possible on every clock cycle. Range of operating
frequencies, programmable burst length and programmable
latencies allow the same device to be useful for a variety of
high bandwidth, high performance memory system
applications.
ORDERING INFORMATION
Product ID
Max
Freq.
Package Comments
M52D128324A -5BG2E 200MHz 90 Ball BGA Pb-free
M52D128324A -6BG2E 166MHz 90 Ball BGA Pb-free
M52D128324A -7BG2E 143MHz 90 Ball BGA Pb-free
BALL CONFIGURATION (TOP VIEW)
(BGA90, 8mmX13mmX1.0mm Body, 0.8mm Ball Pitch)
1
2
3 456 7
8
9
A DQ26 DQ24 VSS
VDD DQ23 DQ21
B DQ28 VDDQ VSSQ
VDDQ VSSQ DQ19
C VSSQ DQ27 DQ25
DQ22 DQ20 VDDQ
D VSSQ DQ29 DQ30
DQ17 DQ18 VDDQ
E VDDQ DQ31 NC
NC DQ16 VSSQ
F VSS DQM3 A3
A2 DQM2 VDD
G A4 A5 A6
A10 A0 A1
H A7 A8 NC
NC BA1 A11
J CLK CKE A9
BA0 CS RAS
K DQM1 NC NC
CAS WE DQM0
L VDDQ DQ8 VSS
VDD DQ7 VSSQ
M VSSQ DQ10 DQ9
DQ6 DQ5 VDDQ
N VSSQ DQ12 DQ14
DQ1 DQ3 VDDQ
P DQ11 VDDQ VSSQ
VDDQ VSSQ DQ4
R DQ13 DQ15 VSS
VDD DQ0 DQ2
Elite Semiconductor Memory Technology Inc.
Publication Date : Aug. 2012
Revision : 1.0
1/31