PBL38620-2 Datasheet, PDF (8/16 Pages) Ericsson – Subscriber Line Interface Circuit

PBL 386 20/2
PTG 1
24 VTX
RRLY 2
23 AGND
HP 3
22 RSN
RINGX 4
21 REF
BGND 5 24-pin SOIC 20 _PLC
TIPX
6
and
19
24-pin SSOP
POV
VBAT 7
18 PLD
VBAT2 8
17 VCC
PSG 9
16 DET
LP ¹⁰
DT 11
DR 12
15 _C1
14 C2
13 C3
RINGX 5
BGND 6
TIPX 7
VBAT 8
VBAT2 9
PSG 10
NC 11
28-pin PLCC
25 NC
24 REF
23 PLC
22 POV
21 PLD
20 VCC
19 NC
Figure 8. Pin configuration, 24-pin SSOP, 24-pin SOIC and 28 pin PLCC package, top view.
Pin Description
Refer to figure 8.
PLCC Symbol Description
1
PTG
Prog. Transmit Gain. Left open transmit gain = 0.0 dB, connected to AGND transmit gain = -6.02 dB.
2
RRLY
Ring Relay driver output. The relay coil may be connected to maximum +14V.
3
HP
Connection for High Pass filter capacitor, C_HP. Other end of C_HP connects to TIPX.
4
NC
No internal Connection.
5
RINGX The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage
protection components and ring relay (and optional test relay).
6
BGND
Battery Ground, should be tied together with AGND.
7
TIPX
The TIPX and RINGX pins connect to the tip and ring leads of the two-wire interface via overvoltage
protection components and ring relay (and optional test relay).
8
VBAT
Battery supply Voltage. Negative with respect to AGND.
9
VBAT2 An optional second (2) Battery Voltage connects to this pin.
10
PSG
11
NC
Programmable Saturation Guard. The resistive part of the DC feed characteristic is not used for
PBL 386 20/2, RSG = 0 Ω.
No internal Connection.
12
LP
13
DT
Connection for Low Pass filter capacitor, C_LP. Other end of C_LP connects to VBAT.
Input to the ring trip comparator. With DR more positive than DT the detector output, DET, is at logic
level low, indicating off-hook condition. The external ring trip network connects to this input.
8