EM47FM0888MBA_15 Datasheet, PDF (7/38 Pages) Eorex Corporation – Double DATA RATE 3 low voltage SDRAM

EM47FM0888MBA
Pin Capacitance
Symbol
Parameters
Pins
Min.
CCK
Input pin capacitance, CK, /CK CK, /CK
0.8
CDCK
Delta input pin capacitance,
0
CK, /CK
CIN_CTRL
Input pin capacitance, control /CS,CKE,ODT
0.75
pins
CDIN_CTRL
Delta input pin capacitance,
-0.4
control pins
CIN_ADD_CMD Input pin capacitance, address /RAS,/CAS,/WE, 0.75
and command pins
Address
CDIN_ADD_CMD Delta input pin capacitance,
-0.4
address and command pins
CIO
CDIO
Input/output pins capacitance DQ,DQS,/DQS 1.5
Delta input/output pins
capacitance
TDQS,/TDQS,
-0.5
DM
CDDQS
Delta input/output pins
capacitance
DQS, /DQS
0
CZQ
Input/output pin capacitance, ZQ
-
ZQ
Max.
1.4
0.15
1.3
0.2
1.3
0.4
2.5
0.3
0.15
3
Unit Notes
pF
1,3
pF
1,2
pF
1
pF
1,4
pF
1
pF
1,5
pF
1,6
pF
1,7,8
pF
1,10
pF
1,9
Notes1. VDD, VDDQ, VSS, VSSQ applied and all other pins (except the pin under test) floating. VDD = VDDQ
=1.35V, VBIAS=VDD/2.
Notes2. Absolute value of CCK(CK-pin) - CCK(/CK-pin).
Notes3. CCK (min.) will be equal to CIN (min.)
Notes4. CDIN_CTRL = CIN_CTRL - 0.5*(CCK(CK-pin) + CCK(/CK-pin))
Notes5. CDIN_ADD_CMD = CIN_ADD_CMD - 0.5*(CCK(CK-pin) + CCK(/CK-pin))
Notes6. Although the DM, TDQS and /TDQS pins have different functions, the loading matches DQ and DQS.
Notes7. DQ should be in high impedance state.
Notes8. CDIO = CIO (DQ, DM) - 0.5*(CIO(DQS-pin) + CIO(/DQS-pin)).
Notes9. Maximum external load capacitance on ZQ pin is 5pF.
Notes10. Absolute value of CIO(DQS) - CIO(/DQS).
Apr. 2014
7/38
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