EN25F80_1 Datasheet, PDF (8/35 Pages) Eon Silicon Solution Inc. – 8 Megabit Serial Flash Memory with 4Kbytes Uniform Sector

Table 3. Protected Area Sizes Sector Organization
EN25F80
Status Register
Content
BP2 BP1 BP0
Bit Bit Bit
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Memory Content
Protect Areas
None
Sector 0 to 253
Sector 0 to 251
Sector 0 to 247
Sector 0 to 239
Sector 0 to 223
Sector 0 to 191
All
Addresses
None
000000h-0FDFFFh
000000h-0FBFFFh
000000h-0F7FFFh
000000h-0EFFFFh
000000h-0DFFFFh
000000h-0BFFFFh
000000h-0FFFFFh
Density(KB)
None
1016KB
1008KB
992KB
960KB
896KB
768KB
1024KB
Portion
None
Lower 254/256
Lower 252/256
Lower 248/256
Lower 240/256
Lower 224/256
Lower 192/256
All
Hold Function
The Hold (HOLD) signal is used to pause any serial communications with the device without resetting
the clocking sequence. However, taking this signal Low does not terminate any Write Status Register,
Program or Erase cycle that is currently in progress.
To enter the Hold condition, the device must be selected, with Chip Select (CS#) Low. The Hold
condition starts on the falling edge of the Hold (HOLD) signal, provided that this coincides with Serial
Clock (CLK) being Low (as shown in Figure 4.).
The Hold condition ends on the rising edge of the Hold (HOLD) signal, provided that this coincides with
Serial Clock (CLK) being Low.
If the falling edge does not coincide with Serial Clock (CLK) being Low, the Hold condition starts after
Serial Clock (CLK) next goes Low. Similarly, if the rising edge does not coincide with Serial Clock (CLK)
being Low, the Hold condition ends after Serial Clock (CLK) next goes Low. (This is shown in Figure 4.).
During the Hold condition, the Serial Data Output (DO) is high impedance, and Serial Data Input (DI)
and Serial Clock (CLK) are Don’t Care.
Normally, the device is kept selected, with Chip Select (CS#) driven Low, for the whole duration of the
Hold condition. This is to ensure that the state of the internal logic remains unchanged from the moment
of entering the Hold condition.
If Chip Select (CS#) goes High while the device is in the Hold condition, this has the effect of resetting
the internal logic of the device. To restart communication with the device, it is necessary to drive Hold
(HOLD) High, and then to drive Chip Select (CS#) Low. This prevents the device from going back to the
Hold condition.
Figure 4. Hold Condition Waveform
This Data Sheet may be revised by subsequent versions
8
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. K, Issue Date: 2010/05/31
www.eonssi.com